📄 plj.tan.qmsg
字号:
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "34 " "Warning: Found 34 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_GATED_CLK" "bclk " "Info: Detected gated clock \"bclk\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 21 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "bclk" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[5\] " "Info: Detected ripple clock \"q\[5\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[5\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[1\] " "Info: Detected ripple clock \"q\[1\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[1\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[6\] " "Info: Detected ripple clock \"q\[6\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[6\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[3\] " "Info: Detected ripple clock \"q\[3\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[3\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[13\] " "Info: Detected ripple clock \"q\[13\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[13\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[15\] " "Info: Detected ripple clock \"q\[15\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[15\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[14\] " "Info: Detected ripple clock \"q\[14\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[14\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[12\] " "Info: Detected ripple clock \"q\[12\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[12\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[0\] " "Info: Detected ripple clock \"q\[0\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[0\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[4\] " "Info: Detected ripple clock \"q\[4\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[4\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "LessThan0~490 " "Info: Detected gated clock \"LessThan0~490\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "LessThan0~490" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[2\] " "Info: Detected ripple clock \"q\[2\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[2\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[8\] " "Info: Detected ripple clock \"q\[8\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[8\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[11\] " "Info: Detected ripple clock \"q\[11\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[11\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[7\] " "Info: Detected ripple clock \"q\[7\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[7\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[10\] " "Info: Detected ripple clock \"q\[10\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[10\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[9\] " "Info: Detected ripple clock \"q\[9\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[9\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "LessThan0~489 " "Info: Detected gated clock \"LessThan0~489\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "LessThan0~489" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "LessThan0~491 " "Info: Detected gated clock \"LessThan0~491\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "LessThan0~491" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[16\] " "Info: Detected ripple clock \"q\[16\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[16\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[17\] " "Info: Detected ripple clock \"q\[17\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[17\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "LessThan0~492 " "Info: Detected gated clock \"LessThan0~492\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "LessThan0~492" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[23\] " "Info: Detected ripple clock \"q\[23\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[23\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[19\] " "Info: Detected ripple clock \"q\[19\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[19\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[21\] " "Info: Detected ripple clock \"q\[21\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[21\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[22\] " "Info: Detected ripple clock \"q\[22\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[22\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[20\] " "Info: Detected ripple clock \"q\[20\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[20\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[24\] " "Info: Detected ripple clock \"q\[24\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[24\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "LessThan0~493 " "Info: Detected gated clock \"LessThan0~493\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "LessThan0~493" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "LessThan0~488 " "Info: Detected gated clock \"LessThan0~488\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "LessThan0~488" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[18\] " "Info: Detected ripple clock \"q\[18\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[18\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "LessThan0~494 " "Info: Detected gated clock \"LessThan0~494\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "LessThan0~494" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "q\[25\] " "Info: Detected ripple clock \"q\[25\]\" as buffer" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "q\[25\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} } { } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register b7\[0\] register bcd1\[1\] 134.77 MHz 7.42 ns Internal " "Info: Clock \"clk\" has Internal fmax of 134.77 MHz between source register \"b7\[0\]\" and destination register \"bcd1\[1\]\" (period= 7.42 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.084 ns + Longest register register " "Info: + Longest register to register delay is 2.084 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns b7\[0\] 1 REG LCFF_X27_Y14_N7 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X27_Y14_N7; Fanout = 7; REG Node = 'b7\[0\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { b7[0] } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.380 ns) + CELL(0.366 ns) 0.746 ns LessThan1~56 2 COMB LCCOMB_X26_Y14_N22 4 " "Info: 2: + IC(0.380 ns) + CELL(0.366 ns) = 0.746 ns; Loc. = LCCOMB_X26_Y14_N22; Fanout = 4; COMB Node = 'LessThan1~56'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.746 ns" { b7[0] LessThan1~56 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1621 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.225 ns) + CELL(0.225 ns) 1.196 ns sss~636 3 COMB LCCOMB_X26_Y14_N12 16 " "Info: 3: + IC(0.225 ns) + CELL(0.225 ns) = 1.196 ns; Loc. = LCCOMB_X26_Y14_N12; Fanout = 16; COMB Node = 'sss~636'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.450 ns" { LessThan1~56 sss~636 } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.579 ns) + CELL(0.154 ns) 1.929 ns bcd1~89 4 COMB LCCOMB_X26_Y15_N28 1 " "Info: 4: + IC(0.579 ns) + CELL(0.154 ns) = 1.929 ns; Loc. = LCCOMB_X26_Y15_N28; Fanout = 1; COMB Node = 'bcd1~89'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.733 ns" { sss~636 bcd1~89 } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 23 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.155 ns) 2.084 ns bcd1\[1\] 5 REG LCFF_X26_Y15_N29 1 " "Info: 5: + IC(0.000 ns) + CELL(0.155 ns) = 2.084 ns; Loc. = LCFF_X26_Y15_N29; Fanout = 1; REG Node = 'bcd1\[1\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.155 ns" { bcd1~89 bcd1[1] } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 81 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.900 ns ( 43.19 % ) " "Info: Total cell delay = 0.900 ns ( 43.19 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.184 ns ( 56.81 % ) " "Info: Total interconnect delay = 1.184 ns ( 56.81 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.084 ns" { b7[0] LessThan1~56 sss~636 bcd1~89 bcd1[1] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.084 ns" { b7[0] {} LessThan1~56 {} sss~636 {} bcd1~89 {} bcd1[1] {} } { 0.000ns 0.380ns 0.225ns 0.579ns 0.000ns } { 0.000ns 0.366ns 0.225ns 0.154ns 0.155ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-5.152 ns - Smallest " "Info: - Smallest clock skew is -5.152 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.484 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.484 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.854 ns) 0.854 ns clk 1 CLK PIN_N20 27 " "Info: 1: + IC(0.000 ns) + CELL(0.854 ns) = 0.854 ns; Loc. = PIN_N20; Fanout = 27; CLK Node = 'clk'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 8 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.343 ns) + CELL(0.000 ns) 1.197 ns clk~clkctrl 2 COMB CLKCTRL_G3 54 " "Info: 2: + IC(0.343 ns) + CELL(0.000 ns) = 1.197 ns; Loc. = CLKCTRL_G3; Fanout = 54; COMB Node = 'clk~clkctrl'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.343 ns" { clk clk~clkctrl } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 8 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.669 ns) + CELL(0.618 ns) 2.484 ns bcd1\[1\] 3 REG LCFF_X26_Y15_N29 1 " "Info: 3: + IC(0.669 ns) + CELL(0.618 ns) = 2.484 ns; Loc. = LCFF_X26_Y15_N29; Fanout = 1; REG Node = 'bcd1\[1\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.287 ns" { clk~clkctrl bcd1[1] } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 81 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.472 ns ( 59.26 % ) " "Info: Total cell delay = 1.472 ns ( 59.26 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.012 ns ( 40.74 % ) " "Info: Total interconnect delay = 1.012 ns ( 40.74 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.484 ns" { clk clk~clkctrl bcd1[1] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.484 ns" { clk {} clk~combout {} clk~clkctrl {} bcd1[1] {} } { 0.000ns 0.000ns 0.343ns 0.669ns } { 0.000ns 0.854ns 0.000ns 0.618ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 7.636 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 7.636 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.854 ns) 0.854 ns clk 1 CLK PIN_N20 27 " "Info: 1: + IC(0.000 ns) + CELL(0.854 ns) = 0.854 ns; Loc. = PIN_N20; Fanout = 27; CLK Node = 'clk'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 8 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.879 ns) + CELL(0.712 ns) 2.445 ns q\[3\] 2 REG LCFF_X1_Y13_N7 3 " "Info: 2: + IC(0.879 ns) + CELL(0.712 ns) = 2.445 ns; Loc. = LCFF_X1_Y13_N7; Fanout = 3; REG Node = 'q\[3\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.591 ns" { clk q[3] } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 31 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.589 ns) + CELL(0.366 ns) 3.400 ns LessThan0~490 3 COMB LCCOMB_X1_Y12_N26 1 " "Info: 3: + IC(0.589 ns) + CELL(0.366 ns) = 3.400 ns; Loc. = LCCOMB_X1_Y12_N26; Fanout = 1; COMB Node = 'LessThan0~490'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.955 ns" { q[3] LessThan0~490 } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.235 ns) + CELL(0.228 ns) 3.863 ns LessThan0~491 4 COMB LCCOMB_X1_Y12_N24 1 " "Info: 4: + IC(0.235 ns) + CELL(0.228 ns) = 3.863 ns; Loc. = LCCOMB_X1_Y12_N24; Fanout = 1; COMB Node = 'LessThan0~491'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.463 ns" { LessThan0~490 LessThan0~491 } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.212 ns) + CELL(0.154 ns) 4.229 ns LessThan0~493 5 COMB LCCOMB_X1_Y12_N28 1 " "Info: 5: + IC(0.212 ns) + CELL(0.154 ns) = 4.229 ns; Loc. = LCCOMB_X1_Y12_N28; Fanout = 1; COMB Node = 'LessThan0~493'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.366 ns" { LessThan0~491 LessThan0~493 } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.215 ns) + CELL(0.225 ns) 4.669 ns LessThan0~494 6 COMB LCCOMB_X1_Y12_N22 28 " "Info: 6: + IC(0.215 ns) + CELL(0.225 ns) = 4.669 ns; Loc. = LCCOMB_X1_Y12_N22; Fanout = 28; COMB Node = 'LessThan0~494'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.440 ns" { LessThan0~493 LessThan0~494 } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 33 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.233 ns) + CELL(0.225 ns) 5.127 ns bclk 7 COMB LCCOMB_X1_Y12_N20 1 " "Info: 7: + IC(0.233 ns) + CELL(0.225 ns) = 5.127 ns; Loc. = LCCOMB_X1_Y12_N20; Fanout = 1; COMB Node = 'bclk'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { LessThan0~494 bclk } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 21 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.218 ns) + CELL(0.000 ns) 6.345 ns bclk~clkctrl 8 COMB CLKCTRL_G2 30 " "Info: 8: + IC(1.218 ns) + CELL(0.000 ns) = 6.345 ns; Loc. = CLKCTRL_G2; Fanout = 30; COMB Node = 'bclk~clkctrl'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.218 ns" { bclk bclk~clkctrl } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 21 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.673 ns) + CELL(0.618 ns) 7.636 ns b7\[0\] 9 REG LCFF_X27_Y14_N7 7 " "Info: 9: + IC(0.673 ns) + CELL(0.618 ns) = 7.636 ns; Loc. = LCFF_X27_Y14_N7; Fanout = 7; REG Node = 'b7\[0\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.291 ns" { bclk~clkctrl b7[0] } "NODE_NAME" } } { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.382 ns ( 44.29 % ) " "Info: Total cell delay = 3.382 ns ( 44.29 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.254 ns ( 55.71 % ) " "Info: Total interconnect delay = 4.254 ns ( 55.71 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.636 ns" { clk q[3] LessThan0~490 LessThan0~491 LessThan0~493 LessThan0~494 bclk bclk~clkctrl b7[0] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.636 ns" { clk {} clk~combout {} q[3] {} LessThan0~490 {} LessThan0~491 {} LessThan0~493 {} LessThan0~494 {} bclk {} bclk~clkctrl {} b7[0] {} } { 0.000ns 0.000ns 0.879ns 0.589ns 0.235ns 0.212ns 0.215ns 0.233ns 1.218ns 0.673ns } { 0.000ns 0.854ns 0.712ns 0.366ns 0.228ns 0.154ns 0.225ns 0.225ns 0.000ns 0.618ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.484 ns" { clk clk~clkctrl bcd1[1] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.484 ns" { clk {} clk~combout {} clk~clkctrl {} bcd1[1] {} } { 0.000ns 0.000ns 0.343ns 0.669ns } { 0.000ns 0.854ns 0.000ns 0.618ns } "" } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.636 ns" { clk q[3] LessThan0~490 LessThan0~491 LessThan0~493 LessThan0~494 bclk bclk~clkctrl b7[0] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.636 ns" { clk {} clk~combout {} q[3] {} LessThan0~490 {} LessThan0~491 {} LessThan0~493 {} LessThan0~494 {} bclk {} bclk~clkctrl {} b7[0] {} } { 0.000ns 0.000ns 0.879ns 0.589ns 0.235ns 0.212ns 0.215ns 0.233ns 1.218ns 0.673ns } { 0.000ns 0.854ns 0.712ns 0.366ns 0.228ns 0.154ns 0.225ns 0.225ns 0.000ns 0.618ns } "" } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.094 ns + " "Info: + Micro clock to output delay of source is 0.094 ns" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 51 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.090 ns + " "Info: + Micro setup delay of destination is 0.090 ns" { } { { "plj.vhd" "" { Text "E:/数字测频器/数字测频器/plj.vhd" 81 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.084 ns" { b7[0] LessThan1~56 sss~636 bcd1~89 bcd1[1] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.084 ns" { b7[0] {} LessThan1~56 {} sss~636 {} bcd1~89 {} bcd1[1] {} } { 0.000ns 0.380ns 0.225ns 0.579ns 0.000ns } { 0.000ns 0.366ns 0.225ns 0.154ns 0.155ns } "" } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.484 ns" { clk clk~clkctrl bcd1[1] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.484 ns" { clk {} clk~combout {} clk~clkctrl {} bcd1[1] {} } { 0.000ns 0.000ns 0.343ns 0.669ns } { 0.000ns 0.854ns 0.000ns 0.618ns } "" } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.636 ns" { clk q[3] LessThan0~490 LessThan0~491 LessThan0~493 LessThan0~494 bclk bclk~clkctrl b7[0] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.636 ns" { clk {} clk~combout {} q[3] {} LessThan0~490 {} LessThan0~491 {} LessThan0~493 {} LessThan0~494 {} bclk {} bclk~clkctrl {} b7[0] {} } { 0.000ns 0.000ns 0.879ns 0.589ns 0.235ns 0.212ns 0.215ns 0.233ns 1.218ns 0.673ns } { 0.000ns 0.854ns 0.712ns 0.366ns 0.228ns 0.154ns 0.225ns 0.225ns 0.000ns 0.618ns } "" } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0}
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