📄 plj.fit.rpt
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; Optimize IOC Register Placement for Timing ; On ; On ;
; Limit to One Fitting Attempt ; Off ; Off ;
; Final Placement Optimizations ; Automatically ; Automatically ;
; Fitter Aggressive Routability Optimizations ; Automatically ; Automatically ;
; Fitter Initial Placement Seed ; 1 ; 1 ;
; PCI I/O ; Off ; Off ;
; Weak Pull-Up Resistor ; Off ; Off ;
; Enable Bus-Hold Circuitry ; Off ; Off ;
; Auto Global Memory Control Signals ; Off ; Off ;
; Auto Packed Registers -- Stratix II/II GX/III Cyclone II/III Arria GX ; Auto ; Auto ;
; Auto Delay Chains ; On ; On ;
; Auto Merge PLLs ; On ; On ;
; Perform Physical Synthesis for Combinational Logic for Fitting ; Off ; Off ;
; Perform Physical Synthesis for Combinational Logic for Performance ; Off ; Off ;
; Perform Register Duplication for Performance ; Off ; Off ;
; Perform Logic to Memory Mapping for Fitting ; Off ; Off ;
; Perform Register Retiming for Performance ; Off ; Off ;
; Perform Asynchronous Signal Pipelining ; Off ; Off ;
; Fitter Effort ; Auto Fit ; Auto Fit ;
; Physical Synthesis Effort Level ; Normal ; Normal ;
; Logic Cell Insertion - Logic Duplication ; Auto ; Auto ;
; Auto Register Duplication ; Auto ; Auto ;
; Auto Global Clock ; On ; On ;
; Auto Global Register Control Signals ; On ; On ;
; Stop After Congestion Map Generation ; Off ; Off ;
; Save Intermediate Fitting Results ; Off ; Off ;
+-----------------------------------------------------------------------+--------------------------------+--------------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Netlist Optimizations ;
+--------+------------+---------------------------------------------------+--------------------------+-----------+----------------+------------------+------------------+-----------------------+
; Node ; Action ; Operation ; Reason ; Node Port ; Node Port Name ; Destination Node ; Destination Port ; Destination Port Name ;
+--------+------------+---------------------------------------------------+--------------------------+-----------+----------------+------------------+------------------+-----------------------+
; b3[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; b3[3]~DUPLICATE ; ; ;
; b3~491 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; b3~491DUPLICATE ; ; ;
; b5[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; b5[1]~DUPLICATE ; ; ;
; b5~595 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; b5~595DUPLICATE ; ; ;
+--------+------------+---------------------------------------------------+--------------------------+-----------+----------------+------------------+------------------+-----------------------+
Color Legend:
-- Green:
-- Package Resource: The HardCopy II device package can be migrated from the selected Stratix II device package, and the design has been fitted with the target device migration enabled.
-- Other Device Resources: The resource quantity is within the acceptable range of the HardCopy II device and package, indicating that migration from the selected Stratix II device package will likely be successful. You must compile and check the HardCopy II companion revision to ensure migration is successful.
-- Orange:
-- Package Resource: The HardCopy II device package can be migrated from the selected Stratix II device package; however, the design has not been fitted with the target device migration enabled.
-- Other Device Resources: The resource quantity is within the acceptable range of the HardCopy II device and package; however, the resource is constrained so much that the design may not migrate.
-- Red:
-- Package Resource: The HardCopy II device package cannot be migrated from the selected Stratix II device package.
-- Other Device Resources: The design did not migrate because the resource quantity exceeds the acceptable range of the HardCopy II device and package, or, for other reasons detailed in the footnotes.
Note: The used resource quantities listed for each HardCopy II device and package combination are estimates only.
Migrate your design from the selected Stratix II device and compile for the HardCopy II companion revision to obtain the most accurate measurement of HardCopy II resource utilization.
Note: The Device Resource Guide cannot estimate the routing demand by the design in a HardCopy II device.
Migrate your design from the selected Stratix II device and compile for the HardCopy II companion revision to confirm routability of the design in the selected HardCopy II device.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; HardCopy II Device Resource Guide ;
+---------------------------------+----------------------+--------------+--------------+--------------+--------------+---------------+---------------+---------------+
; Resource ; Stratix II EP2S15 ; HC210W ; HC210 ; HC220 ; HC220 ; HC230 ; HC240 ; HC240 ;
+---------------------------------+----------------------+--------------+--------------+--------------+--------------+---------------+---------------+---------------+
; Migration Compatibility ; ; None ; None ; None ; None ; None ; None ; None ;
; Primary Migration Constraint ; ; Package ; Package ; Package ; Package ; Package ; Package ; Package ;
; Package* ; FBGA - 484 ; FBGA - 484 ; FBGA - 484 ; FBGA - 672 ; FBGA - 780 ; FBGA - 1020 ; FBGA - 1020 ; FBGA - 1508 ;
; Logic ; -- ; 1% ; 1% ; 1% ; 1% ; 1% ; 1% ; 1% ;
; -- Logic cells ; 182 ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
; -- DSP elements ; 0 ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
; Pins ; ; ; ; ; ; ; ; ;
; -- Total ; 15 ; 15 / 309 ; 15 / 335 ; 15 / 493 ; 15 / 495 ; 15 / 699 ; 15 / 743 ; 15 / 952 ;
; -- Differential Input ; 0 ; 0 / 66 ; 0 / 70 ; 0 / 90 ; 0 / 90 ; 0 / 128 ; 0 / 224 ; 0 / 272 ;
; -- Differential Output ; 0 ; 0 / 44 ; 0 / 50 ; 0 / 70 ; 0 / 70 ; 0 / 112 ; 0 / 200 ; 0 / 256 ;
; -- PCI / PCI-X ; 0 ; 0 / 159 ; 0 / 166 ; 0 / 244 ; 0 / 246 ; 0 / 358 ; 0 / 366 ; 0 / 471 ;
; -- DQ ; 0 ; 0 / 20 ; 0 / 20 ; 0 / 50 ; 0 / 50 ; 0 / 204 ; 0 / 204 ; 0 / 204 ;
; -- DQS ; 0 ; 0 / 8 ; 0 / 8 ; 0 / 18 ; 0 / 18 ; 0 / 72 ; 0 / 72 ; 0 / 72 ;
; Memory ; ; ; ; ; ; ; ; ;
; -- M-RAM ; 0 ; 0 / 0 ; 0 / 0 ; 0 / 2 ; 0 / 2 ; 0 / 6 ; 0 / 9 ; 0 / 9 ;
; -- M4K blocks & M512 blocks ; 0 ; 0 / 190 ; 0 / 190 ; 0 / 408 ; 0 / 408 ; 0 / 614 ; 0 / 816 ; 0 / 816 ;
; PLLs ; ; ; ; ; ; ; ; ;
; -- Enhanced ; 0 ; 0 / 2 ; 0 / 2 ; 0 / 2 ; 0 / 2 ; 0 / 4 ; 0 / 4 ; 0 / 4 ;
; -- Fast ; 0 ; 0 / 2 ; 0 / 2 ; 0 / 2 ; 0 / 2 ; 0 / 4 ; 0 / 8 ; 0 / 8 ;
; DLLs ; 0 ; 0 / 1 ; 0 / 1 ; 0 / 1 ; 0 / 1 ; 0 / 2 ; 0 / 2 ; 0 / 2 ;
; SERDES ; ; ; ; ; ; ; ; ;
; -- RX ; 0 ; 0 / 17 ; 0 / 21 ; 0 / 31 ; 0 / 31 ; 0 / 46 ; 0 / 92 ; 0 / 116 ;
; -- TX ; 0 ; 0 / 18 ; 0 / 19 ; 0 / 29 ; 0 / 29 ; 0 / 44 ; 0 / 88 ; 0 / 116 ;
; Configuration ; ; ; ; ; ; ; ; ;
; -- CRC ; 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ;
; -- ASMI ; 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ;
; -- Remote Update ; 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ; 0 / 0 ;
; -- JTAG ; 0 ; 0 / 1 ; 0 / 1 ; 0 / 1 ; 0 / 1 ; 0 / 1 ; 0 / 1 ; 0 / 1 ;
+---------------------------------+----------------------+--------------+--------------+--------------+--------------+---------------+---------------+---------------+
* The selected Stratix II device cannot migrate to any HardCopy II device, regardless of the design. Try this design with a different Stratix II device.
+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in E:/数字测频器/数字测频器/plj.pin.
+-----------------------------------------------------------------------+
; Fitter Resource Usage Summary ;
+----------------------------------------------+------------------------+
; Resource ; Usage ;
+----------------------------------------------+------------------------+
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