📄 de2_lcm_test.map.qmsg
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{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~180 GPIO_0\[22\]~13 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~180 to tri-state bus GPIO_0\[22\]~13" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~181 GPIO_0\[23\]~12 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~181 to tri-state bus GPIO_0\[23\]~12" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~182 GPIO_0\[24\]~11 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~182 to tri-state bus GPIO_0\[24\]~11" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~183 GPIO_0\[25\]~10 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~183 to tri-state bus GPIO_0\[25\]~10" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~184 GPIO_0\[26\]~9 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~184 to tri-state bus GPIO_0\[26\]~9" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~186 GPIO_0\[28\]~7 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~186 to tri-state bus GPIO_0\[28\]~7" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~187 GPIO_0\[29\]~6 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~187 to tri-state bus GPIO_0\[29\]~6" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~188 GPIO_0\[30\]~5 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~188 to tri-state bus GPIO_0\[30\]~5" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~189 GPIO_0\[31\]~4 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~189 to tri-state bus GPIO_0\[31\]~4" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~191 GPIO_0\[33\]~2 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~191 to tri-state bus GPIO_0\[33\]~2" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~192 GPIO_0\[34\]~1 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~192 to tri-state bus GPIO_0\[34\]~1" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_FANIN_FROM_ALWAYS_DISABLED_IO_BUF_TO_TRI_BUS" "GPIO_0~193 GPIO_0\[35\]~0 " "Warning: Removed fan-in from always-disabled I/O buffer GPIO_0~193 to tri-state bus GPIO_0\[35\]~0" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Removed fan-in from always-disabled I/O buffer %1!s! to tri-state bus %2!s!" 0 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "I2S_LCM_Config:u4\|I2S_Controller:u0\|I2S_DATA~1 " "Warning: Converting TRI node \"I2S_LCM_Config:u4\|I2S_Controller:u0\|I2S_DATA~1\" that feeds logic to an OR gate" { } { { "I2S_Controller.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_Controller.v" 65 -1 0 } } } 0 0 "Converting TRI node \"%1!s!\" that feeds logic to an OR gate" 0 0}
{ "Info" "IOPT_MLS_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" { } { { "I2S_Controller.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_Controller.v" 101 -1 0 } } } 0 0 "Registers with preset signals will power-up high" 0 0}
{ "Info" "IOPT_MLS_DEV_CLRN_SETS_REGISTERS" "" "Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" { } { } 0 0 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0}
{ "Warning" "WOPT_MLS_ENABLED_OE" "" "Warning: TRI or OPNDRN buffers permanently enabled" { { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[18\]~143 " "Warning: Node \"GPIO_0\[18\]~143\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[19\]~144 " "Warning: Node \"GPIO_0\[19\]~144\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[20\]~145 " "Warning: Node \"GPIO_0\[20\]~145\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[21\]~146 " "Warning: Node \"GPIO_0\[21\]~146\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[22\]~147 " "Warning: Node \"GPIO_0\[22\]~147\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[23\]~148 " "Warning: Node \"GPIO_0\[23\]~148\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[24\]~149 " "Warning: Node \"GPIO_0\[24\]~149\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[25\]~150 " "Warning: Node \"GPIO_0\[25\]~150\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[26\]~151 " "Warning: Node \"GPIO_0\[26\]~151\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[28\]~152 " "Warning: Node \"GPIO_0\[28\]~152\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[29\]~153 " "Warning: Node \"GPIO_0\[29\]~153\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[30\]~154 " "Warning: Node \"GPIO_0\[30\]~154\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[31\]~155 " "Warning: Node \"GPIO_0\[31\]~155\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[33\]~156 " "Warning: Node \"GPIO_0\[33\]~156\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIO_0\[35\]~157 " "Warning: Node \"GPIO_0\[35\]~157\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 44 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} } { } 0 0 "TRI or OPNDRN buffers permanently enabled" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "SRAM_UB_N GND " "Warning: Pin \"SRAM_UB_N\" stuck at GND" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 36 -1 0 } } } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "SRAM_LB_N GND " "Warning: Pin \"SRAM_LB_N\" stuck at GND" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 37 -1 0 } } } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "SRAM_WE_N VCC " "Warning: Pin \"SRAM_WE_N\" stuck at VCC" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 38 -1 0 } } } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "SRAM_CE_N GND " "Warning: Pin \"SRAM_CE_N\" stuck at GND" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 39 -1 0 } } } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "SRAM_OE_N GND " "Warning: Pin \"SRAM_OE_N\" stuck at GND" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 40 -1 0 } } } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "I2C_SCLK GND " "Warning: Pin \"I2C_SCLK\" stuck at GND" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 43 -1 0 } } } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} } { } 0 0 "Output pins are stuck at VCC or GND" 0 0}
{ "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN_HDR" "22 " "Warning: Design contains 22 input pin(s) that do not drive logic" { { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "CLOCK_27 " "Warning: No output dependent on input pin \"CLOCK_27\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 27 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "KEY\[1\] " "Warning: No output dependent on input pin \"KEY\[1\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 30 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "KEY\[2\] " "Warning: No output dependent on input pin \"KEY\[2\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 30 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "KEY\[3\] " "Warning: No output dependent on input pin \"KEY\[3\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 30 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[0\] " "Warning: No output dependent on input pin \"SW\[0\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[1\] " "Warning: No output dependent on input pin \"SW\[1\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[2\] " "Warning: No output dependent on input pin \"SW\[2\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[3\] " "Warning: No output dependent on input pin \"SW\[3\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[4\] " "Warning: No output dependent on input pin \"SW\[4\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[5\] " "Warning: No output dependent on input pin \"SW\[5\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[6\] " "Warning: No output dependent on input pin \"SW\[6\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[7\] " "Warning: No output dependent on input pin \"SW\[7\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[8\] " "Warning: No output dependent on input pin \"SW\[8\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[9\] " "Warning: No output dependent on input pin \"SW\[9\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[10\] " "Warning: No output dependent on input pin \"SW\[10\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[11\] " "Warning: No output dependent on input pin \"SW\[11\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[12\] " "Warning: No output dependent on input pin \"SW\[12\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[13\] " "Warning: No output dependent on input pin \"SW\[13\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[14\] " "Warning: No output dependent on input pin \"SW\[14\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[15\] " "Warning: No output dependent on input pin \"SW\[15\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[16\] " "Warning: No output dependent on input pin \"SW\[16\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "SW\[17\] " "Warning: No output dependent on input pin \"SW\[17\]\"" { } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 32 -1 0 } } } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} } { } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "284 " "Info: Implemented 284 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "24 " "Info: Implemented 24 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "24 " "Info: Implemented 24 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_BIDIRS" "53 " "Info: Implemented 53 bidirectional pins" { } { } 0 0 "Implemented %1!d! bidirectional pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "182 " "Info: Implemented 182 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0} { "Info" "ISCL_SCL_TM_PLLS" "1 " "Info: Implemented 1 ClockLock PLLs" { } { } 0 0 "Implemented %1!d! ClockLock PLLs" 0 0} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 114 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 114 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Jul 30 10:36:38 2007 " "Info: Processing ended: Mon Jul 30 10:36:38 2007" { } { } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
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