de2_lcm_test.map.qmsg

NIOS下

{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 I2S_LCM_Config.v(71) " "Warning (10230): Verilog HDL assignment warning at I2S_LCM_Config.v(71): truncated value with size 32 to match size of target (6)" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 71 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "I2S_Controller I2S_LCM_Config:u4\|I2S_Controller:u0 " "Info: Elaborating entity \"I2S_Controller\" for hierarchy \"I2S_LCM_Config:u4\|I2S_Controller:u0\"" {  } { { "I2S_LCM_Config.v" "u0" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 39 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 I2S_Controller.v(90) " "Warning (10230): Verilog HDL assignment warning at I2S_Controller.v(90): truncated value with size 32 to match size of target (16)" {  } { { "I2S_Controller.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_Controller.v" 90 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "I2S_LCM_Config:u4\|mI2S_DATA\[15\] data_in GND " "Warning: Reduced register \"I2S_LCM_Config:u4\|mI2S_DATA\[15\]\" with stuck data_in port to stuck value GND" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 44 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "I2S_LCM_Config:u4\|mI2S_DATA\[9\] data_in GND " "Warning: Reduced register \"I2S_LCM_Config:u4\|mI2S_DATA\[9\]\" with stuck data_in port to stuck value GND" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 44 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "I2S_LCM_Config:u4\|mI2S_DATA\[8\] data_in GND " "Warning: Reduced register \"I2S_LCM_Config:u4\|mI2S_DATA\[8\]\" with stuck data_in port to stuck value GND" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 44 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "I2S_LCM_Config:u4\|mI2S_DATA\[7\] data_in GND " "Warning: Reduced register \"I2S_LCM_Config:u4\|mI2S_DATA\[7\]\" with stuck data_in port to stuck value GND" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 44 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "I2S_LCM_Config:u4\|mI2S_DATA\[6\] data_in GND " "Warning: Reduced register \"I2S_LCM_Config:u4\|mI2S_DATA\[6\]\" with stuck data_in port to stuck value GND" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 44 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "I2S_LCM_Config:u4\|mI2S_DATA\[2\] I2S_LCM_Config:u4\|mI2S_DATA\[3\] " "Info: Duplicate register \"I2S_LCM_Config:u4\|mI2S_DATA\[2\]\" merged to single register \"I2S_LCM_Config:u4\|mI2S_DATA\[3\]\"" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 44 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST 3 " "Info: State machine \"\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST\" contains 3 states" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 23 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST " "Info: Selected Auto state machine encoding method for state machine \"\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST\"" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 23 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST " "Info: Encoding result for state machine \"\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "3 " "Info: Completed encoding using 3 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "I2S_LCM_Config:u4\|mSetup_ST.0000 " "Info: Encoded state bit \"I2S_LCM_Config:u4\|mSetup_ST.0000\"" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 23 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "I2S_LCM_Config:u4\|mSetup_ST.0010 " "Info: Encoded state bit \"I2S_LCM_Config:u4\|mSetup_ST.0010\"" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 23 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "I2S_LCM_Config:u4\|mSetup_ST.0001 " "Info: Encoded state bit \"I2S_LCM_Config:u4\|mSetup_ST.0001\"" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 23 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST.0000 000 " "Info: State \"\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST.0000\" uses code string \"000\"" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 23 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST.0001 101 " "Info: State \"\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST.0001\" uses code string \"101\"" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 23 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST.0010 110 " "Info: State \"\|DE2_LCM_Test\|I2S_LCM_Config:u4\|mSetup_ST.0010\" uses code string \"110\"" {  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 23 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "I2S_LCM_Config.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/I2S_LCM_Config.v" 23 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "I2C_SDAT " "Warning: The bidir \"I2C_SDAT\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 42 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[0\] " "Warning: The bidir \"SRAM_DQ\[0\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[1\] " "Warning: The bidir \"SRAM_DQ\[1\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[2\] " "Warning: The bidir \"SRAM_DQ\[2\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[3\] " "Warning: The bidir \"SRAM_DQ\[3\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[4\] " "Warning: The bidir \"SRAM_DQ\[4\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[5\] " "Warning: The bidir \"SRAM_DQ\[5\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[6\] " "Warning: The bidir \"SRAM_DQ\[6\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[7\] " "Warning: The bidir \"SRAM_DQ\[7\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[8\] " "Warning: The bidir \"SRAM_DQ\[8\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[9\] " "Warning: The bidir \"SRAM_DQ\[9\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SRAM_DQ\[10\] " "Warning: The bidir \"SRAM_DQ\[10\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "DE2_LCM_Test.v" "" { Text "E:/EDA_DESIGN/DE2_LCM_Test/DE2_LCM_Test.v" 34 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0}