stp1.stp

NIOS下

            <net is_signal_inverted="no" name="iSRAM_ADDR[16]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[15]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[14]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[13]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[12]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[11]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[10]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[9]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[8]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[7]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[6]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[5]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[4]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[3]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[2]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[1]"/>
            <net is_signal_inverted="no" name="iSRAM_ADDR[0]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="lcm_data" order="lsb_to_msb" radix="hex" state="collapse" type="bidir pin">
            <net is_signal_inverted="no" name="GPIO_0[18]"/>
            <net is_signal_inverted="no" name="GPIO_0[19]"/>
            <net is_signal_inverted="no" name="GPIO_0[20]"/>
            <net is_signal_inverted="no" name="GPIO_0[21]"/>
            <net is_signal_inverted="no" name="GPIO_0[22]"/>
            <net is_signal_inverted="no" name="GPIO_0[23]"/>
            <net is_signal_inverted="no" name="GPIO_0[24]"/>
            <net is_signal_inverted="no" name="GPIO_0[25]"/>
          </bus>
          <net is_signal_inverted="no" name="GPIO_0[26]"/>
          <net is_signal_inverted="no" name="GPIO_0[29]"/>
          <net is_signal_inverted="no" name="GPIO_0[35]"/>
        </data_view>
        <setup_view>
          <bus is_signal_inverted="no" link="all" name="H_Cont" order="msb_to_lsb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="H_Cont[10]"/>
            <net is_signal_inverted="no" name="H_Cont[9]"/>
            <net is_signal_inverted="no" name="H_Cont[8]"/>
            <net is_signal_inverted="no" name="H_Cont[7]"/>
            <net is_signal_inverted="no" name="H_Cont[6]"/>
            <net is_signal_inverted="no" name="H_Cont[5]"/>
            <net is_signal_inverted="no" name="H_Cont[4]"/>
            <net is_signal_inverted="no" name="H_Cont[3]"/>
            <net is_signal_inverted="no" name="H_Cont[2]"/>
            <net is_signal_inverted="no" name="H_Cont[1]"/>
            <net is_signal_inverted="no" name="H_Cont[0]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="V_Cont" order="msb_to_lsb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="V_Cont[10]"/>
            <net is_signal_inverted="no" name="V_Cont[9]"/>
            <net is_signal_inverted="no" name="V_Cont[8]"/>
            <net is_signal_inverted="no" name="V_Cont[7]"/>
            <net is_signal_inverted="no" name="V_Cont[6]"/>
            <net is_signal_inverted="no" name="V_Cont[5]"/>
            <net is_signal_inverted="no" name="V_Cont[4]"/>
            <net is_signal_inverted="no" name="V_Cont[3]"/>
            <net is_signal_inverted="no" name="V_Cont[2]"/>
            <net is_signal_inverted="no" name="V_Cont[1]"/>
            <net is_signal_inverted="no" name="V_Cont[0]"/>