stp1.stp

NIOS下

          <wire connection_status="true" name="iSRAM_ADDR[5]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="iSRAM_ADDR[6]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="iSRAM_ADDR[7]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="iSRAM_ADDR[8]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="iSRAM_ADDR[9]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="GPIO_0[18]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[19]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[20]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[21]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[22]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[23]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[24]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[25]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[26]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[29]" tap_mode="probeonly" type="bidir pin"/>
          <wire connection_status="true" name="GPIO_0[35]" tap_mode="probeonly" type="bidir pin"/>
        </data_input_vec>
      </signal_vec>
      <presentation>
        <data_view>
          <bus is_signal_inverted="no" link="all" name="H_Cont" order="msb_to_lsb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="H_Cont[10]"/>
            <net is_signal_inverted="no" name="H_Cont[9]"/>
            <net is_signal_inverted="no" name="H_Cont[8]"/>
            <net is_signal_inverted="no" name="H_Cont[7]"/>
            <net is_signal_inverted="no" name="H_Cont[6]"/>
            <net is_signal_inverted="no" name="H_Cont[5]"/>
            <net is_signal_inverted="no" name="H_Cont[4]"/>
            <net is_signal_inverted="no" name="H_Cont[3]"/>
            <net is_signal_inverted="no" name="H_Cont[2]"/>
            <net is_signal_inverted="no" name="H_Cont[1]"/>
            <net is_signal_inverted="no" name="H_Cont[0]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="V_Cont" order="msb_to_lsb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="V_Cont[10]"/>
            <net is_signal_inverted="no" name="V_Cont[9]"/>
            <net is_signal_inverted="no" name="V_Cont[8]"/>
            <net is_signal_inverted="no" name="V_Cont[7]"/>
            <net is_signal_inverted="no" name="V_Cont[6]"/>
            <net is_signal_inverted="no" name="V_Cont[5]"/>
            <net is_signal_inverted="no" name="V_Cont[4]"/>
            <net is_signal_inverted="no" name="V_Cont[3]"/>
            <net is_signal_inverted="no" name="V_Cont[2]"/>
            <net is_signal_inverted="no" name="V_Cont[1]"/>
            <net is_signal_inverted="no" name="V_Cont[0]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="IMAG_DATA" order="msb_to_lsb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="IMAG_DATA[7]"/>
            <net is_signal_inverted="no" name="IMAG_DATA[6]"/>
            <net is_signal_inverted="no" name="IMAG_DATA[5]"/>
            <net is_signal_inverted="no" name="IMAG_DATA[4]"/>
            <net is_signal_inverted="no" name="IMAG_DATA[3]"/>
            <net is_signal_inverted="no" name="IMAG_DATA[2]"/>
            <net is_signal_inverted="no" name="IMAG_DATA[1]"/>
            <net is_signal_inverted="no" name="IMAG_DATA[0]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="iSRAM_ADDR" order="msb_to_lsb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="iSRAM_ADDR[17]"/>