de2_lcm_test.tan.rpt

NIOS下

; 45.601 ns                               ; 115.15 MHz ( period = 8.684 ns )                    ; V_Cont[6]  ; iSRAM_ADDR[17] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.488 ns                ;
; 45.604 ns                               ; 115.19 MHz ( period = 8.681 ns )                    ; V_Cont[0]  ; iSRAM_ADDR[13] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.485 ns                ;
; 45.605 ns                               ; 115.21 MHz ( period = 8.680 ns )                    ; V_Cont[3]  ; iSRAM_ADDR[16] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.484 ns                ;
; 45.620 ns                               ; 115.41 MHz ( period = 8.665 ns )                    ; V_Cont[2]  ; iSRAM_ADDR[15] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.469 ns                ;
; 45.637 ns                               ; 115.63 MHz ( period = 8.648 ns )                    ; V_Cont[4]  ; iSRAM_ADDR[16] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.452 ns                ;
; 45.670 ns                               ; 116.08 MHz ( period = 8.615 ns )                    ; V_Cont[1]  ; iSRAM_ADDR[14] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.419 ns                ;
; 45.710 ns                               ; 116.62 MHz ( period = 8.575 ns )                    ; V_Cont[7]  ; iSRAM_ADDR[17] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.379 ns                ;
; 45.720 ns                               ; 116.75 MHz ( period = 8.565 ns )                    ; V_Cont[2]  ; iSRAM_ADDR[14] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.369 ns                ;
; 45.721 ns                               ; 116.77 MHz ( period = 8.564 ns )                    ; V_Cont[3]  ; iSRAM_ADDR[15] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.368 ns                ;
; 45.741 ns                               ; 117.04 MHz ( period = 8.544 ns )                    ; V_Cont[1]  ; iSRAM_ADDR[13] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.348 ns                ;
; 45.753 ns                               ; 117.21 MHz ( period = 8.532 ns )                    ; V_Cont[4]  ; iSRAM_ADDR[15] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.336 ns                ;
; 45.784 ns                               ; 117.63 MHz ( period = 8.501 ns )                    ; V_Cont[5]  ; iSRAM_ADDR[17] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.305 ns                ;
; 45.791 ns                               ; 117.73 MHz ( period = 8.494 ns )                    ; V_Cont[2]  ; iSRAM_ADDR[13] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.298 ns                ;
; 45.824 ns                               ; 118.19 MHz ( period = 8.461 ns )                    ; V_Cont[3]  ; iSRAM_ADDR[14] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.265 ns                ;
; 45.828 ns                               ; 118.25 MHz ( period = 8.457 ns )                    ; V_Cont[6]  ; iSRAM_ADDR[16] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.261 ns                ;
; 45.866 ns                               ; 118.78 MHz ( period = 8.419 ns )                    ; V_Cont[8]  ; iSRAM_ADDR[17] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.223 ns                ;
; 45.867 ns                               ; 118.79 MHz ( period = 8.418 ns )                    ; V_Cont[4]  ; iSRAM_ADDR[14] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.222 ns                ;
; 45.895 ns                               ; 119.19 MHz ( period = 8.390 ns )                    ; V_Cont[3]  ; iSRAM_ADDR[13] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.194 ns                ;
; 46.006 ns                               ; 120.79 MHz ( period = 8.279 ns )                    ; V_Cont[5]  ; iSRAM_ADDR[16] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.083 ns                ;
; 46.014 ns                               ; 120.90 MHz ( period = 8.271 ns )                    ; V_Cont[0]  ; iSRAM_ADDR[12] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.075 ns                ;
; 46.047 ns                               ; 121.39 MHz ( period = 8.238 ns )                    ; V_Cont[9]  ; iSRAM_ADDR[17] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 8.042 ns                ;
; 46.142 ns                               ; 122.80 MHz ( period = 8.143 ns )                    ; V_Cont[6]  ; iSRAM_ADDR[15] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.947 ns                ;
; 46.151 ns                               ; 122.94 MHz ( period = 8.134 ns )                    ; V_Cont[1]  ; iSRAM_ADDR[12] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.938 ns                ;
; 46.155 ns                               ; 123.00 MHz ( period = 8.130 ns )                    ; V_Cont[5]  ; iSRAM_ADDR[15] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.934 ns                ;
; 46.193 ns                               ; 123.58 MHz ( period = 8.092 ns )                    ; V_Cont[7]  ; iSRAM_ADDR[16] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.896 ns                ;
; 46.201 ns                               ; 123.70 MHz ( period = 8.084 ns )                    ; V_Cont[2]  ; iSRAM_ADDR[12] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.888 ns                ;
; 46.231 ns                               ; 124.16 MHz ( period = 8.054 ns )                    ; V_Cont[4]  ; iSRAM_ADDR[13] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.858 ns                ;
; 46.305 ns                               ; 125.31 MHz ( period = 7.980 ns )                    ; V_Cont[3]  ; iSRAM_ADDR[12] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.784 ns                ;
; 46.367 ns                               ; 126.29 MHz ( period = 7.918 ns )                    ; V_Cont[8]  ; iSRAM_ADDR[16] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.722 ns                ;
; 46.388 ns                               ; 126.63 MHz ( period = 7.897 ns )                    ; V_Cont[10] ; iSRAM_ADDR[17] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.701 ns                ;
; 46.507 ns                               ; 128.57 MHz ( period = 7.778 ns )                    ; V_Cont[7]  ; iSRAM_ADDR[15] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.582 ns                ;
; 46.548 ns                               ; 129.25 MHz ( period = 7.737 ns )                    ; V_Cont[9]  ; iSRAM_ADDR[16] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.541 ns                ;
; 46.548 ns                               ; 129.25 MHz ( period = 7.737 ns )                    ; V_Cont[5]  ; iSRAM_ADDR[14] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.541 ns                ;
; 46.553 ns                               ; 129.33 MHz ( period = 7.732 ns )                    ; V_Cont[6]  ; iSRAM_ADDR[14] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.536 ns                ;
; 46.626 ns                               ; 130.57 MHz ( period = 7.659 ns )                    ; V_Cont[0]  ; iSRAM_ADDR[11] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.463 ns                ;
; 46.641 ns                               ; 130.82 MHz ( period = 7.644 ns )                    ; V_Cont[4]  ; iSRAM_ADDR[12] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.448 ns                ;
; 46.763 ns                               ; 132.94 MHz ( period = 7.522 ns )                    ; V_Cont[1]  ; iSRAM_ADDR[11] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.326 ns                ;
; 46.813 ns                               ; 133.83 MHz ( period = 7.472 ns )                    ; V_Cont[2]  ; iSRAM_ADDR[11] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.276 ns                ;
; 46.848 ns                               ; 134.46 MHz ( period = 7.437 ns )                    ; V_Cont[8]  ; iSRAM_ADDR[15] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.241 ns                ;
; 46.889 ns                               ; 135.21 MHz ( period = 7.396 ns )                    ; V_Cont[10] ; iSRAM_ADDR[16] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.200 ns                ;
; 46.912 ns                               ; 135.63 MHz ( period = 7.373 ns )                    ; V_Cont[5]  ; iSRAM_ADDR[13] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.177 ns                ;
; 46.917 ns                               ; 135.72 MHz ( period = 7.368 ns )                    ; V_Cont[3]  ; iSRAM_ADDR[11] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.172 ns                ;
; 46.918 ns                               ; 135.74 MHz ( period = 7.367 ns )                    ; V_Cont[7]  ; iSRAM_ADDR[14] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.171 ns                ;
; 46.950 ns                               ; 136.33 MHz ( period = 7.335 ns )                    ; V_Cont[6]  ; iSRAM_ADDR[13] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.139 ns                ;
; 47.029 ns                               ; 137.82 MHz ( period = 7.256 ns )                    ; V_Cont[9]  ; iSRAM_ADDR[15] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.060 ns                ;
; 47.080 ns                               ; 138.79 MHz ( period = 7.205 ns )                    ; V_Cont[0]  ; iSRAM_ADDR[10] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 7.009 ns                ;
; 47.217 ns                               ; 141.48 MHz ( period = 7.068 ns )                    ; V_Cont[1]  ; iSRAM_ADDR[10] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.872 ns                ;
; 47.253 ns                               ; 142.21 MHz ( period = 7.032 ns )                    ; V_Cont[4]  ; iSRAM_ADDR[11] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.836 ns                ;
; 47.267 ns                               ; 142.49 MHz ( period = 7.018 ns )                    ; V_Cont[2]  ; iSRAM_ADDR[10] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.822 ns                ;
; 47.315 ns                               ; 143.47 MHz ( period = 6.970 ns )                    ; V_Cont[7]  ; iSRAM_ADDR[13] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.774 ns                ;
; 47.322 ns                               ; 143.62 MHz ( period = 6.963 ns )                    ; V_Cont[5]  ; iSRAM_ADDR[12] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.767 ns                ;
; 47.348 ns                               ; 144.15 MHz ( period = 6.937 ns )                    ; V_Cont[8]  ; iSRAM_ADDR[14] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.741 ns                ;
; 47.370 ns                               ; 144.61 MHz ( period = 6.915 ns )                    ; V_Cont[10] ; iSRAM_ADDR[15] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.719 ns                ;
; 47.371 ns                               ; 144.63 MHz ( period = 6.914 ns )                    ; V_Cont[3]  ; iSRAM_ADDR[10] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.718 ns                ;
; 47.431 ns                               ; 145.90 MHz ( period = 6.854 ns )                    ; V_Cont[6]  ; iSRAM_ADDR[12] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.658 ns                ;
; 47.718 ns                               ; 152.28 MHz ( period = 6.567 ns )                    ; V_Cont[4]  ; iSRAM_ADDR[10] ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; LCM_PLL:u0|altpll:altpll_component|_clk0 ; 54.285 ns                   ; 54.089 ns                 ; 6.371 ns                ;