dds.eda.qmsg

来自「直接数字频率合成器」· QMSG 代码 · 共 6 行

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer " "Info: Running Quartus II EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.2 Build 157 12/07/2004 SJ Full Version " "Info: Version 4.2 Build 157 12/07/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon May 08 10:24:00 2006 " "Info: Processing started: Mon May 08 10:24:00 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --import_settings_files=off --export_settings_files=off dds -c dds " "Info: Command: quartus_eda --import_settings_files=off --export_settings_files=off dds -c dds" {  } {  } 0}
{ "Info" "IBASEO_DONE_HDL_SDO_GENERATION" "dds.vo dds_v.sdo E:/My_Designs/max/simulation/modelsim/ simulation " "Info: Generated files \"dds.vo\" and \"dds_v.sdo\" in directory \"E:/My_Designs/max/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s " "Info: Quartus II EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon May 08 10:24:01 2006 " "Info: Processing ended: Mon May 08 10:24:01 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}