dds.fit.eqn

直接数字频率合成器

--L6_cs_buffer[2] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC7_B9
--operation mode is arithmetic

L6_cs_buffer[2] = freword[2] $ E1_dffs[2] $ L6_cout[1];

--L6_cout[2] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[2] at LC7_B9
--operation mode is arithmetic

L6_cout[2] = CARRY(freword[2] & E1_dffs[2] # L6_cout[1] # !freword[2] & E1_dffs[2] & L6_cout[1]);


--L6_cs_buffer[3] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC8_B9
--operation mode is arithmetic

L6_cs_buffer[3] = freword[3] $ E1_dffs[3] $ L6_cout[2];

--L6_cout[3] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[3] at LC8_B9
--operation mode is arithmetic

L6_cout[3] = CARRY(freword[3] & E1_dffs[3] # L6_cout[2] # !freword[3] & E1_dffs[3] & L6_cout[2]);


--L6_cs_buffer[4] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC1_B11
--operation mode is arithmetic

L6_cs_buffer[4] = freword[4] $ E1_dffs[4] $ L6_cout[3];

--L6_cout[4] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[4] at LC1_B11
--operation mode is arithmetic

L6_cout[4] = CARRY(freword[4] & E1_dffs[4] # L6_cout[3] # !freword[4] & E1_dffs[4] & L6_cout[3]);


--L6_cs_buffer[5] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC2_B11
--operation mode is arithmetic

L6_cs_buffer[5] = freword[5] $ E1_dffs[5] $ L6_cout[4];

--L6_cout[5] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[5] at LC2_B11
--operation mode is arithmetic

L6_cout[5] = CARRY(freword[5] & E1_dffs[5] # L6_cout[4] # !freword[5] & E1_dffs[5] & L6_cout[4]);


--L6_cs_buffer[6] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] at LC3_B11
--operation mode is arithmetic

L6_cs_buffer[6] = freword[6] $ E1_dffs[6] $ L6_cout[5];

--L6_cout[6] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[6] at LC3_B11
--operation mode is arithmetic

L6_cout[6] = CARRY(freword[6] & E1_dffs[6] # L6_cout[5] # !freword[6] & E1_dffs[6] & L6_cout[5]);


--L6_cs_buffer[7] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] at LC4_B11
--operation mode is arithmetic

L6_cs_buffer[7] = freword[7] $ E1_dffs[7] $ L6_cout[6];

--L6_cout[7] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[7] at LC4_B11
--operation mode is arithmetic

L6_cout[7] = CARRY(freword[7] & E1_dffs[7] # L6_cout[6] # !freword[7] & E1_dffs[7] & L6_cout[6]);


--J2_unreg_res_node[8] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|unreg_res_node[8] at LC5_B11
--operation mode is normal

J2_unreg_res_node[8] = freword[8] $ L6_cout[7] $ E1_dffs[8];


--clk is clk at PIN_43
--operation mode is input

clk = INPUT();


--phase[8] is phase[8] at PIN_84
--operation mode is input

phase[8] = INPUT();


--phase[0] is phase[0] at PIN_2
--operation mode is input

phase[0] = INPUT();


--phase[1] is phase[1] at PIN_44
--operation mode is input

phase[1] = INPUT();


--phase[2] is phase[2] at PIN_42
--operation mode is input

phase[2] = INPUT();


--phase[3] is phase[3] at PIN_1
--operation mode is input

phase[3] = INPUT();


--phase[4] is phase[4] at PIN_6
--operation mode is input

phase[4] = INPUT();


--phase[5] is phase[5] at PIN_3
--operation mode is input

phase[5] = INPUT();


--phase[6] is phase[6] at PIN_67
--operation mode is input

phase[6] = INPUT();


--phase[7] is phase[7] at PIN_9
--operation mode is input

phase[7] = INPUT();


--freword[8] is freword[8] at PIN_7
--operation mode is input

freword[8] = INPUT();


--freword[0] is freword[0] at PIN_37
--operation mode is input

freword[0] = INPUT();


--freword[1] is freword[1] at PIN_24
--operation mode is input

freword[1] = INPUT();


--freword[2] is freword[2] at PIN_21
--operation mode is input

freword[2] = INPUT();


--freword[3] is freword[3] at PIN_23
--operation mode is input

freword[3] = INPUT();


--freword[4] is freword[4] at PIN_11
--operation mode is input

freword[4] = INPUT();


--freword[5] is freword[5] at PIN_64
--operation mode is input

freword[5] = INPUT();


--freword[6] is freword[6] at PIN_36
--operation mode is input

freword[6] = INPUT();


--freword[7] is freword[7] at PIN_66
--operation mode is input

freword[7] = INPUT();


--sinvalue[9] is sinvalue[9] at PIN_69
--operation mode is output

sinvalue[9] = OUTPUT(G1_q[9]);


--sinvalue[8] is sinvalue[8] at PIN_65
--operation mode is output

sinvalue[8] = OUTPUT(G1_q[8]);


--sinvalue[7] is sinvalue[7] at PIN_25
--operation mode is output

sinvalue[7] = OUTPUT(G1_q[7]);


--sinvalue[6] is sinvalue[6] at PIN_29
--operation mode is output

sinvalue[6] = OUTPUT(G1_q[6]);


--sinvalue[5] is sinvalue[5] at PIN_28
--operation mode is output

sinvalue[5] = OUTPUT(G1_q[5]);


--sinvalue[4] is sinvalue[4] at PIN_30
--operation mode is output

sinvalue[4] = OUTPUT(G1_q[4]);


--sinvalue[3] is sinvalue[3] at PIN_50
--operation mode is output

sinvalue[3] = OUTPUT(G1_q[3]);


--sinvalue[2] is sinvalue[2] at PIN_18
--operation mode is output

sinvalue[2] = OUTPUT(G1_q[2]);


--sinvalue[1] is sinvalue[1] at PIN_19
--operation mode is output

sinvalue[1] = OUTPUT(G1_q[1]);


--sinvalue[0] is sinvalue[0] at PIN_22
--operation mode is output

sinvalue[0] = OUTPUT(G1_q[0]);