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📄 stage3_library.mdl

📁 用MATLAB里的XILINX BLOCKS编写, 做嵌入式用的2个BLOCKS, 一个为除法BLOCK, 另一个为乘方BLOCK.
💻 MDL
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	    Line {
	      SrcBlock		      "R_in"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Slice2"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Slice1"
	      SrcPort		      1
	      Points		      [15, 0; 0, -105]
	      DstBlock		      "Concat"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Slice2"
	      SrcPort		      1
	      DstBlock		      "Concat"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Concat"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "R_out"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Slice"
	      SrcPort		      1
	      DstBlock		      "Concat1"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Concat1"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "N_out"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Con1"
	      SrcPort		      1
	      Points		      [10, 0; 0, -30]
	      DstBlock		      "Concat1"
	      DstPort		      2
	    }
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Slice2"
	  Ports			  [1, 1]
	  Position		  [590, 165, 620, 195]
	  SourceBlock		  "xbsIndex_r4/Slice"
	  SourceType		  "Xilinx Bit Slice Extractor Block"
	  infoedit		  "Extracts a given range of bits from each in"
"put sample and presents it at the output.  The output type is ordinarily unsi"
"gned with binary point at zero, but can be Boolean when the slice is one bit "
"wide.<P><P>Hardware notes: In hardware this block costs nothing."
	  nbits			  "W-1"
	  boolean_output	  off
	  mode			  "Lower Bit Location + Width"
	  bit1			  "0"
	  base1			  "MSB of Input"
	  bit0			  "0"
	  base0			  "LSB of Input"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,449,407"
	  block_type		  "slice"
	  block_version		  "8.2.02"
	  sg_icon_stat		  "30,30,1,1,white,blue,0,fe24a11e"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 30 30 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 "
"19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[3 8 15 22 27 27 25 27 27 20 26 21 1"
"5 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 30 30 0 0 ]);"
"\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon "
"text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT:"
" end icon text');\n"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Q"
	  Position		  [970, 598, 1000, 612]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "R"
	  Position		  [970, 678, 1000, 692]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Outport
	  Name			  "valid"
	  Position		  [975, 468, 1005, 482]
	  Port			  "3"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  Name			  "R_out"
	  Labels		  [0, 0]
	  SrcBlock		  "Shift_With_Carry"
	  SrcPort		  2
	  Points		  [0, 0; 50, 0]
	  Branch {
	    Points		    [0, 85]
	    Branch {
	      DstBlock		      "Relational"
	      DstPort		      1
	    }
	    Branch {
	      DstBlock		      "Register2"
	      DstPort		      1
	    }
	  }
	  Branch {
	    DstBlock		    "AddSub"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "C"
	  Labels		  [2, 0]
	  SrcBlock		  "Relational"
	  SrcPort		  1
	  Points		  [0, 0; 15, 0]
	  Branch {
	    Points		    [0, 50]
	    DstBlock		    "Mux"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Concat"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Slice2"
	  SrcPort		  1
	  DstBlock		  "Concat"
	  DstPort		  1
	}
	Line {
	  Name			  "Q"
	  Labels		  [-1, 0]
	  SrcBlock		  "Concat"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Register1"
	  DstPort		  1
	}
	Line {
	  Name			  "R"
	  Labels		  [0, 0]
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  Points		  [-20, 0; 0, -5]
	  Branch {
	    Labels		    [1, 0]
	    Points		    [0, 95]
	    DstBlock		    "Delay3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -190]
	    DstBlock		    "Shift_With_Carry"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Register2"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "AddSub"
	  SrcPort		  1
	  Points		  [30, 0; 0, 220]
	  DstBlock		  "Register5"
	  DstPort		  1
	}
	Line {
	  Name			  "N_in"
	  Labels		  [0, 0]
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Shift_With_Carry"
	  DstPort		  1
	}
	Line {
	  Name			  "N_out"
	  Labels		  [0, 0]
	  SrcBlock		  "Shift_With_Carry"
	  SrcPort		  1
	  Points		  [15, 0; 0, -65; -205, 0; 0, 65]
	  DstBlock		  "Mux1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Delay4"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  1
	}
	Line {
	  Name			  "count"
	  Labels		  [0, 0]
	  SrcBlock		  "Counter"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Relational1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "D1"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  Name			  "done"
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  Points		  [0, 0; 5, 0]
	  Branch {
	    Labels		    [1, 0]
	    DstBlock		    "Rise_Edge"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 70]
	    DstBlock		    "Expression"
	    DstPort		    2
	  }
	}
	Line {
	  Name			  "X"
	  Labels		  [0, 0]
	  SrcBlock		  "Register5"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  Name			  "N_lat"
	  Labels		  [2, 0]
	  SrcBlock		  "Register6"
	  SrcPort		  1
	  Points		  [0, 0; 15, 0]
	  Branch {
	    Points		    [0, -320]
	    DstBlock		    "Mux1"
	    DstPort		    3
	  }
	  Branch {
	    Points		    [0, 150]
	    Branch {
	      DstBlock		      "Relational3"
	      DstPort		      2
	    }
	    Branch {
	      Points		      [0, 110]
	      DstBlock		      "Mux3"
	      DstPort		      3
	    }
	  }
	}
	Line {
	  Name			  "D_lat"
	  SrcBlock		  "Register7"
	  SrcPort		  1
	  Points		  [0, 0; 60, 0]
	  Branch {
	    DstBlock		    "Delay2"
	    DstPort		    1
	  }
	  Branch {
	    Labels		    [1, 0]
	    Points		    [0, 75]
	    DstBlock		    "Relational3"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "en_lat"
	  SrcBlock		  "Delay1"
	  SrcPort		  1
	  Points		  [0, 0; 30, 0]
	  Branch {
	    Points		    [95, 0]
	    Branch {
	      Labels		      [1, 0]
	      Points		      [470, 0; 0, -75]
	      Branch {
		DstBlock		"Register3"
		DstPort			2
	      }
	      Branch {
		Points			[0, 0; 0, -70]
		Branch {
		  DstBlock		  "Register8"
		  DstPort		  2
		}
		Branch {
		  Points		  [0, -205]
		  DstBlock		  "Register4"
		  DstPort		  2
		}
	      }
	    }
	    Branch {
	      Points		      [0, -20]
	      Branch {
		Points			[0, -95]
		Branch {
		  DstBlock		  "Delay4"
		  DstPort		  1
		}
		Branch {
		  Points		  [0, -25; 175, 0; 0, -50]
		  Branch {
		    DstBlock		    "Register5"
		    DstPort		    2
		  }
		  Branch {
		    Points		    [0, -50]
		    DstBlock		    "Register2"
		    DstPort		    2
		  }
		}
	      }
	      Branch {
		DstBlock		"Latch_start"
		DstPort			1
	      }
	    }
	  }
	  Branch {
	    Labels		    [1, 1]
	    Points		    [0, -500]
	    DstBlock		    "Mux1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Delay3"
	  SrcPort		  1
	  Points		  [0, 0]
	  DstBlock		  "Register8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "start"
	  SrcPort		  1
	  Points		  [0, 0; 20, 0]
	  Branch {
	    DstBlock		    "Delay1"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -50; 0, 0]
	    Branch {
	      DstBlock		      "Register7"
	      DstPort		      2
	    }
	    Branch {
	      Points		      [0, -55]
	      DstBlock		      "Register6"
	      DstPort		      2
	    }
	  }
	}
	Line {
	  Labels		  [0, 0]
	  SrcBlock		  "Delay2"
	  SrcPort		  1
	  Points		  [0, 0; 5, 0]
	  Branch {
	    DstBlock		    "Relational"
	    DstPort		    

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