matri_key.tan.rpt

矩阵键盘的扫描的vhdl代码

+-------------------------------------------------------+--------------------+------+----+
; Device name                                           ; EPF10K10LC84-4     ;      ;    ;
; Report IO Paths Separately                            ; Off                ;      ;    ;
; Ignore user-defined clock settings                    ; Off                ;      ;    ;
; Default hold multicycle                               ; Same as Multicycle ;      ;    ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;
; Cut off clear and preset signal paths                 ; On                 ;      ;    ;
; Cut off read during write signal paths                ; On                 ;      ;    ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;
; Run Minimum Analysis                                  ; On                 ;      ;    ;
; Use Minimum Timing Models                             ; Off                ;      ;    ;
; Number of paths to report                             ; 200                ;      ;    ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;
+-------------------------------------------------------+--------------------+------+----+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                                 ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
; Type                   ; Slack ; Required Time ; Actual Time                      ; From                                                                     ; To                                                                       ;
+------------------------+-------+---------------+----------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+
; Worst-case tco         ; N/A   ; None          ; 37.700 ns                        ; P1_temp[1]                                                               ; display[10]                                                              ;
; Worst-case tpd         ; N/A   ; None          ; 37.300 ns                        ; line[1]                                                                  ; display[10]                                                              ;
; Worst-case minimum tco ; N/A   ; None          ; 21.700 ns                        ; P1_temp[1]                                                               ; row[3]                                                                   ;
; Worst-case minimum tpd ; N/A   ; None          ; 20.900 ns                        ; line[2]                                                                  ; display[0]                                                               ;
; Clock Setup: 'clk'     ; N/A   ; None          ; 55.87 MHz ( period = 17.900 ns ) ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[25] ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[31] ;
+------------------------+-------+---------------+----------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                               ;
+---------------------------------------------------------------------------------------------------------------------------------------
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; clk             ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk'                                                                                                                                                                                                                                                                                                                                                     ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
; Slack                                   ; Actual fmax (period)                                       ; From                                                                     ; To                                                                       ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 55.87 MHz ( period = 17.900 ns )                           ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[27] ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[24] ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 55.87 MHz ( period = 17.900 ns )                           ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[26] ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[24] ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 55.87 MHz ( period = 17.900 ns )                           ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[25] ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[24] ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 55.87 MHz ( period = 17.900 ns )                           ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[27] ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[25] ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 55.87 MHz ( period = 17.900 ns )                           ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[26] ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[25] ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 55.87 MHz ( period = 17.900 ns )                           ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[25] ; division:U1|lpm_counter:coutQ_rtl_0|alt_counter_f10ke:wysi_counter|q[25] ; clk        ; clk      ; None                        ; None                      ; None                    ;