shift_clk.ssf.msg

来自「vhdl编写的一个完整工程」· MSG 代码 · 共 2 行

{  Info "IDBC_ERROR_COUNT" "shift_clk Simulation was successful 0 s 0 s " "Design shift_clk: Simulation was successful. 0 errors, 0 warnings" {  } {  }  }