📄 fs511.l
字号:
Thu Mar 01 17:29:24 2007
SAM8 Assembler for Reduced Instruction Ver. 2.10T(Win32)
Copyright (c) 1999 Samsung Electronics Co.
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Source File Name : FS511.src
Output File Name : FS511.o
List File Name : FS511.l
1 ;*******************************************************;
2 ;model: scale ;
3 ;author: henny ;
4 ;create date: 2007/1/13 ;
5 ;modify date: 2007/3/1 ;
6 ;chip: samsung s3f9488 ;
7 ;note: copyright (c) 2007 chas electronics co. ;
8 ;*******************************************************;
9 .include "s3c9488.reg"
10 ; S3C9488.REG Copyright (c) 2002 AUTOTEK SYSTEM.
11
12 .list on
13
14
15
16
17 .include "memory.h"
18 00 E3 fs511 equ p3
19 00 00 neta equ 0
20 00 01 netb equ 1
21 00 02 netc equ 2
22 00 03 netd equ 3
23 00 03 cs equ 3
24 00 04 sk equ 4
25 00 05 di equ 5
26 00 06 do equ 6
27 00 06 rdby equ 6
28 ;---------------------------------;
29 00 30 buf0_h equ 30h
30 00 31 buf0_l equ 31h
31
32 00 32 buf1_h equ 32h
33 00 33 buf1_l equ 33h
34
35 00 34 buf2_h equ 34h
36 00 35 buf2_l equ 35h
37
38 00 36 buf3_h equ 36h
39 00 37 buf3_l equ 37h
40
41 00 38 buf4_h equ 38h
42 00 39 buf4_l equ 39h
43
44 00 3A buf5_h equ 3ah
45 00 3B buf5_l equ 3bh
46
47 00 3C buf6_h equ 3ch
48 00 3D buf6_l equ 3dh
49
50 00 3E buf7_h equ 3eh
51 00 3F buf7_l equ 3fh
52
53 00 40 data_h equ 40h
54 00 41 data_l equ 41h
55 00 42 data1_h equ 42h
56 00 43 data1_l equ 43h
57 00 44 data2_h equ 44h
58 00 45 data2_l equ 45h
59 00 46 zero_h equ 46h
60 00 47 zero_l equ 47h
61 00 48 ad_data equ 48h
62
63 00 50 bufa_h equ 50h
64 00 51 bufa_l equ 51h
65 00 52 bufb_h equ 52h
66 00 53 bufb_l equ 53h
67 00 54 bufc_h equ 54h
68 00 55 bufc_l equ 55h
69 00 56 temp_h equ 56h
70 00 57 temp_l equ 57h
71 00 58 gain_h equ 58h
72 00 59 gain_l equ 59h
73 00 5A count_h equ 5ah
74 00 5B count_l equ 5bh
75 00 5C weight_h equ 5ch
76 00 5D weight_l equ 5dh
77
78 00 60 height_h equ 60h
79 00 61 height_l equ 61h
80 00 62 height_inch_h equ 62h
81 00 63 height_inch_l equ 63h
82 00 66 weight_lb_h equ 66h
83 00 67 weight_lb_l equ 67h
84 00 68 Fat_Bar equ 68h
85 00 69 Water_Bar equ 69h
86 00 00 lcd_ram equ 00h
87 .include "macro.src"
88 ;***************************************;
89 ;*******SAM88RCRI bit operator macro****;
90 ;***************************************;
91 setb: macro register,bitn
92 or register,#1<<bitn
93 endm
94
95 clrb: macro register,bitn
96 and register,#0ffh-(1<<bitn)
97 endm
98
99 cplb: macro register,bitn
100 xor register,#1<<bitn
101 endm
102
103 tmb: macro register,bitn
104 tm register,#1<<bitn
105 endm
106
107 sk_pls: macro
108 setb fs511,sk
109 dly
110 clrb fs511,sk
111 dly
112 endm
113
114 dly: macro
115 nop
116 nop
117 nop
118 nop
119 endm
120
121 0100 .org 0100h
122
123 0100 reset:
124 0100 8F di
125 0101 E6 E5 AA ld wdtcon,#10101010b ; disable watch dog
126 0104 E6 D4 18 ld clkcon,#00011000b ; fxx/1(4mhz)
127 0107 E6 D9 C0 ld sp,#0c0h
128
129 010A F6 02 01 call fs511_init
130 ;ld r0,#neta
131 ;call fs511_read
132 ;ld r0,#netb
133 ;call fs511_read
134 ;ld r0,#netc
135 ;call fs511_read
136 ;ld r0,#netd
137 ;call fs511_read
138
139 010D F6 03 A7 call get_scale_zero
140 0110 F6 03 B4 call calcul_gain
141 0113 main:
142 0113 F6 02 C8 call get_ad_average_data
143 0116 F6 03 E1 call calcul_count
144 0119 8B F8 jr main
145 ;---------------------------------------;
146 011B test_addr_bit:
147 011B 6B 09 jr z,test_addr_bit_out_0
148 <01> setb fs511,di
149 011D 46 E3 20 or register,#1<<bitn
150 <01> endm
151 <01> dly
152 0120 FF nop
153 0121 FF nop
154 0122 FF nop
155 0123 FF nop
156 <01> endm
157 0124 8B 07 jr test_addr_bit_out_1
158 0126 test_addr_bit_out_0:
159 <01> clrb fs511,di
160 0126 56 E3 DF and register,#0ffh-(1<<bitn)
161 <01> endm
162 <01> dly
163 0129 FF nop
164 012A FF nop
165 012B FF nop
166 012C FF nop
167 <01> endm
168 012D test_addr_bit_out_1:
169 <01> sk_pls
170 <02> setb fs511,sk
171 012D 46 E3 10 or register,#1<<bitn
172 <02> endm
173 <02> dly
174 0130 FF nop
175 0131 FF nop
176 0132 FF nop
177 0133 FF nop
178 <02> endm
179 <02> clrb fs511,sk
180 0134 56 E3 EF and register,#0ffh-(1<<bitn)
181 <02> endm
182 <02> dly
183 0137 FF nop
184 0138 FF nop
185 0139 FF nop
186 013A FF nop
187 <02> endm
188 <01> endm
189 013B AF ret
190 ;---------------------------------------;
191 ;fs511 write function
192 ;address:r0,data:r1
193 ;---------------------------------------;
194 013C out_a_byte:
195 013C 8C 08 ld r8,#8
196 013E out_loop:
197 013E 10 C1 rlc r1
198 0140 7B 06 jr c,out_bit1
199 <01> clrb fs511,di
200 0142 56 E3 DF and register,#0ffh-(1<<bitn)
201 <01> endm
202 0145 8D 01 4B jp out_bit0
203 0148 out_bit1:
204 <01> setb fs511,di
205 0148 46 E3 20 or register,#1<<bitn
206 <01> endm
207 014B out_bit0
208 <01> sk_pls
209 <02> setb fs511,sk
210 014B 46 E3 10 or register,#1<<bitn
211 <02> endm
212 <02> dly
213 014E FF nop
214 014F FF nop
215 0150 FF nop
216 0151 FF nop
217 <02> endm
218 <02> clrb fs511,sk
219 0152 56 E3 EF and register,#0ffh-(1<<bitn)
220 <02> endm
221 <02> dly
222 0155 FF nop
223 0156 FF nop
224 0157 FF nop
225 0158 FF nop
226 <02> endm
227 <01> endm
228 0159 00 C8 dec r8
229 015B EB E1 jr nz,out_loop
230 015D AF ret
231 ;---------------------------------------;
232 015E fs511_write:
233 <01> clrb fs511,cs
234 015E 56 E3 F7 and register,#0ffh-(1<<bitn)
235 <01> endm
236 <01> dly
237 0161 FF nop
238 0162 FF nop
239 0163 FF nop
240 0164 FF nop
241 <01> endm
242 <01> clrb fs511,di
243 0165 56 E3 DF and register,#0ffh-(1<<bitn)
244 <01> endm
245 <01> dly
246 0168 FF nop
247 0169 FF nop
248 016A FF nop
249 016B FF nop
250 <01> endm
251 <01> sk_pls
252 <02> setb fs511,sk
253 016C 46 E3 10 or register,#1<<bitn
254 <02> endm
255 <02> dly
256 016F FF nop
257 0170 FF nop
258 0171 FF nop
259 0172 FF nop
260 <02> endm
261 <02> clrb fs511,sk
262 0173 56 E3 EF and register,#0ffh-(1<<bitn)
263 <02> endm
264 <02> dly
265 0176 FF nop
266 0177 FF nop
267 0178 FF nop
268 0179 FF nop
269 <02> endm
270 <01> endm
271
272 <01> tmb r0,1
273 017A 76 C0 02 tm register,#1<<bitn
274 <01> endm
275 017D F6 01 1B call test_addr_bit
276 <01> tmb r0,0
277 0180 76 C0 01 tm register,#1<<bitn
278 <01> endm
279 0183 F6 01 1B call test_addr_bit
280
281 <01> clrb fs511,di
282 0186 56 E3 DF and register,#0ffh-(1<<bitn)
283 <01> endm
284 <01> sk_pls
285 <02> setb fs511,sk
286 0189 46 E3 10 or register,#1<<bitn
287 <02> endm
288 <02> dly
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