📄 mcf5206.h
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#define MCF5206_DRAMC_DCTR_CRP_15 (0x0000)
#define MCF5206_DRAMC_DCTR_CRP_25 (0x0020)
#define MCF5206_DRAMC_DCTR_CRP_35 (0x0040)
#define MCF5206_DRAMC_DCTR_CAS (0x0008)
#define MCF5206_DRAMC_DCTR_CP (0x0002)
#define MCF5206_DRAMC_DCTR_CSR (0x0001)
#define MCF5206_DRAMC_DCAR_BASE(a) (((a)&0xFFFE0000)>>16)
#define MCF5206_DRAMC_DCMR_MASK_128M (0x07FE0000)
#define MCF5206_DRAMC_DCMR_MASK_64M (0x03FE0000)
#define MCF5206_DRAMC_DCMR_MASK_32M (0x01FE0000)
#define MCF5206_DRAMC_DCMR_MASK_16M (0x00FE0000)
#define MCF5206_DRAMC_DCMR_MASK_8M (0x007E0000)
#define MCF5206_DRAMC_DCMR_MASK_4M (0x003E0000)
#define MCF5206_DRAMC_DCMR_MASK_2M (0x001E0000)
#define MCF5206_DRAMC_DCMR_MASK_1M (0x000E0000)
#define MCF5206_DRAMC_DCMR_MASK_512K (0x00060000)
#define MCF5206_DRAMC_DCMR_MASK_256K (0x00020000)
#define MCF5206_DRAMC_DCMR_MASK_128K (0x00000000)
#define MCF5206_DRAMC_DCMR_SC (0x00000010)
#define MCF5206_DRAMC_DCMR_SD (0x00000008)
#define MCF5206_DRAMC_DCMR_UC (0x00000004)
#define MCF5206_DRAMC_DCMR_UD (0x00000002)
#define MCF5206_DRAMC_DCCR_PS_32 (0x00)
#define MCF5206_DRAMC_DCCR_PS_16 (0x80)
#define MCF5206_DRAMC_DCCR_PS_8 (0x40)
#define MCF5206_DRAMC_DCCR_PS_MASK (0xC0)
#define MCF5206_DRAMC_DCCR_BPS_512B (0x00)
#define MCF5206_DRAMC_DCCR_BPS_1K (0x10)
#define MCF5206_DRAMC_DCCR_BPS_2K (0x20)
#define MCF5206_DRAMC_DCCR_PM_NORMAL (0x00)
#define MCF5206_DRAMC_DCCR_PM_BURSTPAGE (0x04)
#define MCF5206_DRAMC_DCCR_PM_FASTPAGE (0x0C)
#define MCF5206_DRAMC_DCCR_WR (0x02)
#define MCF5206_DRAMC_DCCR_RD (0x01)
/***********************************************************************/
/*
* UART Module, UART
*/
#define MCF5206_UART0_UMR (0x0140)
#define MCF5206_UART0_USR (0x0144)
#define MCF5206_UART0_UCSR (0x0144)
#define MCF5206_UART0_UCR (0x0148)
#define MCF5206_UART0_URB (0x014C)
#define MCF5206_UART0_UTB (0x014C)
#define MCF5206_UART0_UIPCR (0x0150)
#define MCF5206_UART0_UACR (0x0150)
#define MCF5206_UART0_UISR (0x0154)
#define MCF5206_UART0_UIMR (0x0154)
#define MCF5206_UART0_UBG1 (0x0158)
#define MCF5206_UART0_UBG2 (0x015C)
#define MCF5206_UART0_UIVR (0x0170)
#define MCF5206_UART0_UIP (0x0174)
#define MCF5206_UART0_UOP1 (0x0178)
#define MCF5206_UART0_UOP0 (0x017C)
#define MCF5206_UART1_UMR (0x0180)
#define MCF5206_UART1_USR (0x0184)
#define MCF5206_UART1_UCSR (0x0184)
#define MCF5206_UART1_UCR (0x0188)
#define MCF5206_UART1_URB (0x018C)
#define MCF5206_UART1_UTB (0x018C)
#define MCF5206_UART1_UIPCR (0x0190)
#define MCF5206_UART1_UACR (0x0190)
#define MCF5206_UART1_UISR (0x0194)
#define MCF5206_UART1_UIMR (0x0194)
#define MCF5206_UART1_UBG1 (0x0198)
#define MCF5206_UART1_UBG2 (0x019C)
#define MCF5206_UART1_UIVR (0x01B0)
#define MCF5206_UART1_UIP (0x01B4)
#define MCF5206_UART1_UOP1 (0x01B8)
#define MCF5206_UART1_UOP0 (0x01BC)
/* Read access macros for general use */
#define MCF5206_RD_UART0_UMR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART0_UMR,8)
#define MCF5206_RD_UART0_USR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART0_USR,8)
#define MCF5206_RD_UART0_URB(IMMP) Mcf5206_iord(IMMP,MCF5206_UART0_URB,8)
#define MCF5206_RD_UART0_UIPCR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART0_UIPCR,8)
#define MCF5206_RD_UART0_UISR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART0_UISR,8)
#define MCF5206_RD_UART0_UBG1(IMMP) Mcf5206_iord(IMMP,MCF5206_UART0_UBG1,8)
#define MCF5206_RD_UART0_UBG2(IMMP) Mcf5206_iord(IMMP,MCF5206_UART0_UBG2,8)
#define MCF5206_RD_UART0_UIVR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART0_UIVR,8)
#define MCF5206_RD_UART0_UIP(IMMP) Mcf5206_iord(IMMP,MCF5206_UART0_UIP,8)
#define MCF5206_RD_UART1_UMR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART1_UMR,8)
#define MCF5206_RD_UART1_USR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART1_USR,8)
#define MCF5206_RD_UART1_URB(IMMP) Mcf5206_iord(IMMP,MCF5206_UART1_URB,8)
#define MCF5206_RD_UART1_UIPCR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART1_UIPCR,8)
#define MCF5206_RD_UART1_UISR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART1_UISR,8)
#define MCF5206_RD_UART1_UBG1(IMMP) Mcf5206_iord(IMMP,MCF5206_UART1_UBG1,8)
#define MCF5206_RD_UART1_UBG2(IMMP) Mcf5206_iord(IMMP,MCF5206_UART1_UBG2,8)
#define MCF5206_RD_UART1_UIVR(IMMP) Mcf5206_iord(IMMP,MCF5206_UART1_UIVR,8)
#define MCF5206_RD_UART1_UIP(IMMP) Mcf5206_iord(IMMP,MCF5206_UART1_UIP,8)
/* Write access macros for general use */
#define MCF5206_WR_UART0_UMR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UMR,8,DATA)
#define MCF5206_WR_UART0_UCSR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UCSR,8,DATA)
#define MCF5206_WR_UART0_UCR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UCR,8,DATA)
#define MCF5206_WR_UART0_UTB(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UTB,8,DATA)
#define MCF5206_WR_UART0_UACR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UACR,8,DATA)
#define MCF5206_WR_UART0_UIMR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UIMR,8,DATA)
#define MCF5206_WR_UART0_UBG1(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UBG1,8,DATA)
#define MCF5206_WR_UART0_UBG2(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UBG2,8,DATA)
#define MCF5206_WR_UART0_UIVR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UIVR,8,DATA)
#define MCF5206_WR_UART0_UOP1(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UOP1,8,DATA)
#define MCF5206_WR_UART0_UOP0(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART0_UOP0,8,DATA)
#define MCF5206_WR_UART1_UMR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UMR,8,DATA)
#define MCF5206_WR_UART1_UCSR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UCSR,8,DATA)
#define MCF5206_WR_UART1_UCR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UCR,8,DATA)
#define MCF5206_WR_UART1_UTB(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UTB,8,DATA)
#define MCF5206_WR_UART1_UACR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UACR,8,DATA)
#define MCF5206_WR_UART1_UIMR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UIMR,8,DATA)
#define MCF5206_WR_UART1_UBG1(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UBG1,8,DATA)
#define MCF5206_WR_UART1_UBG2(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UBG2,8,DATA)
#define MCF5206_WR_UART1_UIVR(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UIVR,8,DATA)
#define MCF5206_WR_UART1_UOP1(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UOP1,8,DATA)
#define MCF5206_WR_UART1_UOP0(IMMP,DATA) \
Mcf5206_iowr(IMMP,MCF5206_UART1_UOP0,8,DATA)
#if 1
typedef volatile struct
{
uint8 reserved1[0x140];
uint8 UMR;
uint8 reserved2;
uint8 reserved3;
uint8 reserved4;
uint8 USR;
uint8 reserved5;
uint8 reserved6;
uint8 reserved7;
uint8 UCR;
uint8 reserved8;
uint8 reserved9;
uint8 reserved10;
uint8 UBUF;
uint8 reserved11;
uint8 reserved12;
uint8 reserved13;
uint8 UACR;
uint8 reserved14;
uint8 reserved15;
uint8 reserved16;
uint8 UIR;
uint8 reserved17;
uint8 reserved18;
uint8 reserved19;
uint8 UBG1;
uint8 reserved20;
uint8 reserved21;
uint8 reserved22;
uint8 UBG2;
uint32 reserved23[4];
uint8 UIVR;
uint8 reserved24;
uint8 reserved25;
uint8 reserved26;
uint8 UIP;
uint8 reserved27;
uint8 reserved28;
uint8 reserved29;
uint8 UOP1;
uint8 reserved30;
uint8 reserved31;
uint8 reserved32;
uint8 UOP0;
} MCF5206_UART0;
typedef volatile struct
{
uint8 reserved1[0x180];
uint8 UMR;
uint8 reserved2;
uint8 reserved3;
uint8 reserved4;
uint8 USR;
uint8 reserved5;
uint8 reserved6;
uint8 reserved7;
uint8 UCR;
uint8 reserved8;
uint8 reserved9;
uint8 reserved10;
uint8 UBUF;
uint8 reserved11;
uint8 reserved12;
uint8 reserved13;
uint8 UACR;
uint8 reserved14;
uint8 reserved15;
uint8 reserved16;
uint8 UIR;
uint8 reserved17;
uint8 reserved18;
uint8 reserved19;
uint8 UBG1;
uint8 reserved20;
uint8 reserved21;
uint8 reserved22;
uint8 UBG2;
uint32 reserved23[4];
uint8 UIVR;
uint8 reserved24;
uint8 reserved25;
uint8 reserved26;
uint8 UIP;
uint8 reserved27;
uint8 reserved28;
uint8 reserved29;
uint8 UOP1;
uint8 reserved30;
uint8 reserved31;
uint8 reserved32;
uint8 UOP0;
} MCF5206_UART1;
#endif
#define MCF5206_UART_UMR1_RXRTS (0x80)
#define MCF5206_UART_UMR1_RXIRQ (0x40)
#define MCF5206_UART_UMR1_ERR (0x20)
#define MCF5206_UART_UMR1_PM1 (0x10)
#define MCF5206_UART_UMR1_PM0 (0x08)
#define MCF5206_UART_UMR1_PMT (0x04)
#define MCF5206_UART_UMR1_BC1 (0x02)
#define MCF5206_UART_UMR1_BC0 (0x01)
#define MCF5206_UART_UMR1_PM_MULTI_ADDR (0x1C)
#define MCF5206_UART_UMR1_PM_MULTI_DATA (0x18)
#define MCF5206_UART_UMR1_PM_NONE (0x10)
#define MCF5206_UART_UMR1_PM_FORCE_HI (0x0C)
#define MCF5206_UART_UMR1_PM_FORCE_LO (0x08)
#define MCF5206_UART_UMR1_PM_ODD (0x04)
#define MCF5206_UART_UMR1_PM_EVEN (0x00)
#define MCF5206_UART_UMR1_BC_5 (0x00)
#define MCF5206_UART_UMR1_BC_6 (0x01)
#define MCF5206_UART_UMR1_BC_7 (0x02)
#define MCF5206_UART_UMR1_BC_8 (0x03)
#define MCF5206_UART_UMR2_CM1 (0x80)
#define MCF5206_UART_UMR2_CM0 (0x40)
#define MCF5206_UART_UMR2_TXRTS (0x20)
#define MCF5206_UART_UMR2_TXCTS (0x10)
#define MCF5206_UART_UMR2_SB3 (0x08)
#define MCF5206_UART_UMR2_SB2 (0x04)
#define MCF5206_UART_UMR2_SB1 (0x02)
#define MCF5206_UART_UMR2_SB0 (0x01)
#define MCF5206_UART_UMR2_CM_NORMAL (0x00)
#define MCF5206_UART_UMR2_CM_ECHO (0x40)
#define MCF5206_UART_UMR2_CM_LOCAL_LOOP (0x80)
#define MCF5206_UART_UMR2_CM_REMOTE_LOOP (0xC0)
#define MCF5206_UART_UMR2_STOP_BITS_1 (0x07)
#define MCF5206_UART_UMR2_STOP_BITS_15 (0x08)
#define MCF5206_UART_UMR2_STOP_BITS_2 (0x0F)
#define MCF5206_UART_USR_RB (0x80)
#define MCF5206_UART_USR_FE (0x40)
#define MCF5206_UART_USR_PE (0x20)
#define MCF5206_UART_USR_OE (0x10)
#define MCF5206_UART_USR_TXEMP (0x08)
#define MCF5206_UART_USR_TXRDY (0x04)
#define MCF5206_UART_USR_FFULL (0x02)
#define MCF5206_UART_USR_RXRDY (0x01)
#define MCF5206_UART_UCSR_RCS3 (0x80)
#define MCF5206_UART_UCSR_RCS2 (0x40)
#define MCF5206_UART_UCSR_RCS1 (0x20)
#define MCF5206_UART_UCSR_RCS0 (0x10)
#define MCF5206_UART_UCSR_TCS3 (0x08)
#define MCF5206_UART_UCSR_TCS2 (0x04)
#define MCF5206_UART_UCSR_TCS1 (0x02)
#define MCF5206_UART_UCSR_TCS0 (0x01)
#define MCF5206_UART_UCSR_RCS(x) ((x & 0x0f) << 4)
#define MCF5206_UART_UCSR_TCS(x) (x & 0x0f)
#define MCF5206_UART_UCSR_RX_TIMER (0xD0)
#define MCF5206_UART_UCSR_RX_16EXT (0xE0)
#define MCF5206_UART_UCSR_RX_1EXT (0xF0)
#define MCF5206_UART_UCSR_TX_TIMER (0x0D)
#define MCF5206_UART_UCSR_TX_16EXT (0x0E)
#define MCF5206_UART_UCSR_TX_1EXT (0x0F)
#define MCF5206_UART_UCR_MISC2 (0x40)
#define MCF5206_UART_UCR_MISC1 (0x20)
#define MCF5206_UART_UCR_MISC0 (0x10)
#define MCF5206_UART_UCR_TC1 (0x08)
#define MCF5206_UART_UCR_TC0 (0x04)
#define MCF5206_UART_UCR_RC1 (0x02)
#define MCF5206_UART_UCR_RC0 (0x01)
#define MCF5206_UART_UCR_NONE (0x00)
#define MCF5206_UART_UCR_STOP_BREAK (0x70)
#define MCF5206_UART_UCR_START_BREAK (0x60)
#define MCF5206_UART_UCR_RESET_BKCHGINT (0x50)
#define MCF5206_UART_UCR_RESET_ERROR (0x40)
#define MCF5206_UART_UCR_RESET_TX (0x30)
#define MCF5206_UART_UCR_RESET_RX (0x20)
#define MCF5206_UART_UCR_RESET_MR (0x10)
#define MCF5206_UART_UCR_TX_DISABLED (0x08)
#define MCF5206_UART_UCR_TX_ENABLED (0x04)
#define MCF5206_UART_UCR_RX_DISABLED (0x02)
#define MCF5206_UART_UCR_RX_ENABLED (0x01)
#define MCF5206_UART_UIPCR_COS (0x10)
#define MCF5206_UART_UIPCR_CTS (0x01)
#define MCF5206_UART_UACR_IEC (0x01)
#define MCF5206_UART_UISR_COS (0x80)
#define MCF5206_UART_UISR_DB (0x04)
#define MCF5206_UART_UISR_RXRDY (0x02)
#define MCF5206_UART_UISR_TXRDY (0x01)
#define MCF5206_UART_UIMR_COS (0x80)
#define MCF5206_UART_UIMR_DB (0x04)
#define MCF5206_UART_UIMR_FFULL (0x02)
#define MCF5206_UART_UIMR_TXRDY (0x01)
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