📄 fft_wave.tfw
字号:
////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2003 Xilinx, Inc.
// All Right Reserved.
////////////////////////////////////////////////////////////////////////////////
// ____ ____
// / /\/ /
// /___/ \ / Vendor: Xilinx
// \ \ \/ Version : 8.2.02i
// \ \ Application : ISE
// / / Filename : fft_wave.tfw
// /___/ /\ Timestamp : Tue Sep 05 14:27:26 2006
// \ \ / \
// \___\/\___\
//
//Command:
//Design Name: fft_wave
//Device: Xilinx
//
`timescale 1ns/1ps
module fft_wave;
reg clk = 1'b0;
reg reset = 1'b0;
wire [15:0] xn_re;
reg [15:0] xn_im = 16'b0000000000000000;
wire [6:0] xn_index;
wire [6:0] ram_addr;
wire rfd;
wire [15:0] xk_re;
wire [15:0] xk_im;
wire [4:0] blk;
reg start = 1'b0;
wire done;
wire [6:0] xk_index;
parameter PERIOD = 20;
parameter real DUTY_CYCLE = 0.5;
parameter OFFSET = 100;
initial // Clock process for clk
begin
#OFFSET;
forever
begin
clk = 1'b0;
#(PERIOD-(PERIOD*DUTY_CYCLE)) clk = 1'b1;
#(PERIOD*DUTY_CYCLE);
end
end
fft_test UUT (
.clk(clk),
.reset(reset),
.xn_re(xn_re),
.xn_im(xn_im),
.xn_index(xn_index),
.ram_addr(ram_addr),
.rfd(rfd),
.xk_re(xk_re),
.xk_im(xk_im),
.blk(blk),
.start(start),
.done(done),
.xk_index(xk_index));
integer TX_ERROR = 0;
initial begin // Open the results file...
#1020 // Final time: 1020 ns
if (TX_ERROR == 0) begin
$display("No errors or warnings.");
end else begin
$display("%d errors found in simulation.", TX_ERROR);
end
$stop;
end
initial begin
// ------------- Current Time: 108ns
#108;
reset = 1'b1;
// -------------------------------------
// ------------- Current Time: 128ns
#20;
reset = 1'b0;
// -------------------------------------
// ------------- Current Time: 168ns
#40;
start = 1'b1;
// -------------------------------------
// ------------- Current Time: 188ns
#20;
start = 1'b0;
// -------------------------------------
end
task CHECK_xn_re;
input [15:0] NEXT_xn_re;
#0 begin
if (NEXT_xn_re !== xn_re) begin
$display("Error at time=%dns xn_re=%b, expected=%b", $time, xn_re, NEXT_xn_re);
TX_ERROR = TX_ERROR + 1;
end
end
endtask
task CHECK_xn_index;
input [6:0] NEXT_xn_index;
#0 begin
if (NEXT_xn_index !== xn_index) begin
$display("Error at time=%dns xn_index=%b, expected=%b", $time, xn_index, NEXT_xn_index);
TX_ERROR = TX_ERROR + 1;
end
end
endtask
task CHECK_ram_addr;
input [6:0] NEXT_ram_addr;
#0 begin
if (NEXT_ram_addr !== ram_addr) begin
$display("Error at time=%dns ram_addr=%b, expected=%b", $time, ram_addr, NEXT_ram_addr);
TX_ERROR = TX_ERROR + 1;
end
end
endtask
task CHECK_rfd;
input NEXT_rfd;
#0 begin
if (NEXT_rfd !== rfd) begin
$display("Error at time=%dns rfd=%b, expected=%b", $time, rfd, NEXT_rfd);
TX_ERROR = TX_ERROR + 1;
end
end
endtask
task CHECK_xk_re;
input [15:0] NEXT_xk_re;
#0 begin
if (NEXT_xk_re !== xk_re) begin
$display("Error at time=%dns xk_re=%b, expected=%b", $time, xk_re, NEXT_xk_re);
TX_ERROR = TX_ERROR + 1;
end
end
endtask
task CHECK_xk_im;
input [15:0] NEXT_xk_im;
#0 begin
if (NEXT_xk_im !== xk_im) begin
$display("Error at time=%dns xk_im=%b, expected=%b", $time, xk_im, NEXT_xk_im);
TX_ERROR = TX_ERROR + 1;
end
end
endtask
task CHECK_blk;
input [4:0] NEXT_blk;
#0 begin
if (NEXT_blk !== blk) begin
$display("Error at time=%dns blk=%b, expected=%b", $time, blk, NEXT_blk);
TX_ERROR = TX_ERROR + 1;
end
end
endtask
task CHECK_done;
input NEXT_done;
#0 begin
if (NEXT_done !== done) begin
$display("Error at time=%dns done=%b, expected=%b", $time, done, NEXT_done);
TX_ERROR = TX_ERROR + 1;
end
end
endtask
task CHECK_xk_index;
input [6:0] NEXT_xk_index;
#0 begin
if (NEXT_xk_index !== xk_index) begin
$display("Error at time=%dns xk_index=%b, expected=%b", $time, xk_index, NEXT_xk_index);
TX_ERROR = TX_ERROR + 1;
end
end
endtask
endmodule
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -