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m25513cModel TechnologydD:\Develop\PQS\FPGA\fft_testEfftw1155364557DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg ;=HO^zHA_?5X<eH5`NWFM2DP unisim vcomponents :oJn^3mI;Xj2ce@[UMdE41DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2Ffft.vhdl0L48V;U3P9K:;a4R964ln1c[:<3OE;C;6.1f;3131o-explicit -93tExplicit 1 GenerateLoopIterationMax 100000AstructureDP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg ;=HO^zHA_?5X<eH5`NWFM2DP unisim vcomponents :oJn^3mI;Xj2ce@[UMdE41DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work fft ;U3P9K:;a4R964ln1c[:<3l3704L70VLTU;ZmUDQORL:BBmiaTIe2OE;C;6.1f;3131M6 ieee std_logic_1164M5 unisim vcomponentsM4 unisim vpkgM3 std textioM2 ieee vital_timingM1 ieee vital_primitiveso-explicit -93tExplicit 1 GenerateLoopIterationMax 100000vfft_testI9zXePd0OOdLP;o@kY?Kz40V8`6mZdDLiQKOUlXI^A]L`1w1157437626Ffft_test.vL0 21V8`6mZdDLiQKOUlXI^A]L`1OE;L;6.1f;31r131tGenerateLoopIterationMax 100000vfft_waveIFWT84VQ6g3m^>kfFIJz0U1VAJ7DHMbnVi@z911:1MKYf1w1157437646Ffft_wave.tfwL0 21VAJ7DHMbnVi@z911:1MKYf1OE;L;6.1f;31r131tGenerateLoopIterationMax 100000vglblIEIn^FK==Eb4`eUgnT@hSM3VnN]4Gon>inod6>M^M2[SV1w1147889348FC:/Xilinx/verilog/src/glbl.vL0 5VnN]4Gon>inod6>M^M2[SV1OE;L;6.1f;31r131tGenerateLoopIterationMax 100000Eramw1157436839DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2Fram.vhdl0L43V3H;FYgDj]1Wo;:C_P<dG`3OE;C;6.1f;3131o-explicit -93tExplicit 1 GenerateLoopIterationMax 100000Aram_aDP xilinxcorelib blkmemsp_pkg_v6_2 7;0@OIH:8a38CzXnAzKgP2DP xilinxcorelib iputils_conv Q3<jGM5WGdLVdX<Z=C5hJ3DP xilinxcorelib ul_utils P`JC=Qm8EL?4YK]k^N;6J0DP std textio K]Z^fghZ6B=BjnK5NomDT3DP xilinxcorelib mem_init_file_pack_v6_2 nij8kocaff48WZXkago]B3DE xilinxcorelib blkmemsp_v6_2 8i=OI2]bNVmj8czUkh_Z71DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work ram 3H;FYgDj]1Wo;:C_P<dG`3l98L52V0^32aUM?:U5XnMfRzUEb60OE;C;6.1f;3131M6 ieee std_logic_1164M5 xilinxcorelib mem_init_file_pack_v6_2M4 std textioM3 xilinxcorelib ul_utilsM2 xilinxcorelib iputils_convM1 xilinxcorelib blkmemsp_pkg_v6_2o-explicit -93tExplicit 1 GenerateLoopIterationMax 100000⌨️ 快捷键说明
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