📄 dptrafficlight.tan.rpt
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; Analyze latches as synchronous elements ; On ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
+-------------------------------------------------------+--------------------+------+----+-------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'Clock' ;
+-----------------------------------------+-----------------------------------------------------+------------------------------+-------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+------------------------------+-------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; 128.09 MHz ( period = 7.807 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[6] ; Clock ; Clock ; None ; None ; 7.546 ns ;
; N/A ; 128.09 MHz ( period = 7.807 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[2] ; Clock ; Clock ; None ; None ; 7.546 ns ;
; N/A ; 128.09 MHz ( period = 7.807 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[1] ; Clock ; Clock ; None ; None ; 7.546 ns ;
; N/A ; 128.09 MHz ( period = 7.807 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[3] ; Clock ; Clock ; None ; None ; 7.546 ns ;
; N/A ; 128.09 MHz ( period = 7.807 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[0] ; Clock ; Clock ; None ; None ; 7.546 ns ;
; N/A ; 128.09 MHz ( period = 7.807 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[4] ; Clock ; Clock ; None ; None ; 7.546 ns ;
; N/A ; 128.09 MHz ( period = 7.807 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[5] ; Clock ; Clock ; None ; None ; 7.546 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[13] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[12] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[11] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[16] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[15] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[14] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[10] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[9] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[8] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 128.19 MHz ( period = 7.801 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[7] ; Clock ; Clock ; None ; None ; 7.540 ns ;
; N/A ; 129.55 MHz ( period = 7.719 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[23] ; Clock ; Clock ; None ; None ; 7.458 ns ;
; N/A ; 129.55 MHz ( period = 7.719 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[24] ; Clock ; Clock ; None ; None ; 7.458 ns ;
; N/A ; 129.55 MHz ( period = 7.719 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[21] ; Clock ; Clock ; None ; None ; 7.458 ns ;
; N/A ; 129.55 MHz ( period = 7.719 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[20] ; Clock ; Clock ; None ; None ; 7.458 ns ;
; N/A ; 129.55 MHz ( period = 7.719 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[22] ; Clock ; Clock ; None ; None ; 7.458 ns ;
; N/A ; 129.55 MHz ( period = 7.719 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[19] ; Clock ; Clock ; None ; None ; 7.458 ns ;
; N/A ; 129.55 MHz ( period = 7.719 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[18] ; Clock ; Clock ; None ; None ; 7.458 ns ;
; N/A ; 129.55 MHz ( period = 7.719 ns ) ; int_div:inst14|count_p[1] ; int_div:inst14|count_p[17] ; Clock ; Clock ; None ; None ; 7.458 ns ;
; N/A ; 133.28 MHz ( period = 7.503 ns ) ; int_div:inst1|count_p[0] ; int_div:inst1|count_p[7] ; Clock ; Clock ; None ; None ; 7.242 ns ;
; N/A ; 133.28 MHz ( period = 7.503 ns ) ; int_div:inst1|count_p[0] ; int_div:inst1|count_p[2] ; Clock ; Clock ; None ; None ; 7.242 ns ;
; N/A ; 133.28 MHz ( period = 7.503 ns ) ; int_div:inst1|count_p[0] ; int_div:inst1|count_p[6] ; Clock ; Clock ; None ; None ; 7.242 ns ;
; N/A ; 133.28 MHz ( period = 7.503 ns ) ; int_div:inst1|count_p[0] ; int_div:inst1|count_p[5] ; Clock ; Clock ; None ; None ; 7.242 ns ;
; N/A ; 133.28 MHz ( period = 7.503 ns ) ; int_div:inst1|count_p[0] ; int_div:inst1|count_p[4] ; Clock ; Clock ; None ; None ; 7.242 ns ;
; N/A ; 133.28 MHz ( period = 7.503 ns ) ; int_div:inst1|count_p[0] ; int_div:inst1|count_p[3] ; Clock ; Clock ; None ; None ; 7.242 ns ;
; N/A ; 133.28 MHz ( period = 7.503 ns ) ; int_div:inst1|count_p[0] ; int_div:inst1|count_p[0] ; Clock ; Clock ; None ; None ; 7.242 ns ;
; N/A ; 133.28 MHz ( period = 7.503 ns ) ; int_div:inst1|count_p[0] ; int_div:inst1|count_p[1] ; Clock ; Clock ; None ; None ; 7.242 ns ;
; N/A ; 133.46 MHz ( period = 7.493 ns ) ; int_div:inst14|count_p[0] ; int_div:inst14|count_p[6] ; Clock ; Clock ; None ; None ; 7.232 ns ;
; N/A ; 133.46 MHz ( period = 7.493 ns ) ; int_div:inst14|count_p[0] ; int_div:inst14|count_p[2] ; Clock ; Clock ; None ; None ; 7.232 ns ;
; N/A ; 133.46 MHz ( period = 7.493 ns ) ; int_div:inst14|count_p[0] ; int_div:inst14|count_p[1] ; Clock ; Clock ; None ; None ; 7.232 ns ;
; N/A ; 133.46 MHz ( period = 7.493 ns ) ; int_div:inst14|count_p[0] ; int_div:inst14|count_p[3] ; Clock ; Clock ; None ; None ; 7.232 ns ;
; N/A ; 133.46 MHz ( period = 7.493 ns ) ; int_div:inst14|count_p[0] ; int_div:inst14|count_p[0] ; Clock ; Clock ; None ; None ; 7.232 ns ;
; N/A ; 133.46 MHz ( period = 7.493 ns ) ; int_div:inst14|count_p[0] ; int_div:inst14|count_p[4] ; Clock ; Clock ; None ; None ; 7.232 ns ;
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