adcint.map.summary

来自「用FPGA实现的ADC采样器」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Mon Dec 18 21:21:48 2006
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : ADCINT
Top-level Entity Name : ADCINT
Family : Cyclone
Total logic elements : 14
Total pins : 23
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0