chengfa2.vhd

在采用 320x240 屏的设计实验箱上运行

                  A=>A_MULT_B5(2),B=>S_TEMP4(2),C_in=>C_OUT_B4(1),
                  S=>S_TEMP5(1),C_out=>C_OUT_B4(2));
            U_4_3:one_bit_adder port map(
                  A=>A_MULT_B5(3),B=>S_TEMP4(3),C_in=>C_OUT_B4(2),
                  S=>S_TEMP5(2),C_out=>C_OUT_B4(3));
            U_4_4:one_bit_adder port map(
                  A=>A_MULT_B5(4),B=>S_TEMP4(4),C_in=>C_OUT_B4(3),
                  S=>S_TEMP5(3),C_out=>C_OUT_B4(4));
            U_4_5:one_bit_adder port map(
                  A=>A_MULT_B5(5),B=>S_TEMP4(5),C_in=>C_OUT_B4(4),
                  S=>S_TEMP5(4),C_out=>C_OUT_B4(5));
            U_4_6:one_bit_adder port map(
                  A=>A_MULT_B5(6),B=>S_TEMP4(6),C_in=>C_OUT_B4(5),
                  S=>S_TEMP5(5),C_out=>C_OUT_B4(6));
            U_4_7:one_bit_adder port map(
                  A=>A_MULT_B5(7),B=>ZERO,C_in=>C_OUT_B4(6),
                  S=>S_TEMP5(6),C_out=>C_OUT_B4(7));

            U_5_0:one_bit_adder port map(
                  A=>A_MULT_B6(0),B=>S_TEMP5(0),C_in=>ZERO,
                  S=>C_TEMP(6),C_out=>C_OUT_B5(0));
            U_5_1:one_bit_adder port map(
                  A=>A_MULT_B6(1),B=>S_TEMP5(1),C_in=>C_OUT_B5(0),
                  S=>S_TEMP6(0),C_out=>C_OUT_B5(1));
            U_5_2:one_bit_adder port map(
                  A=>A_MULT_B6(2),B=>S_TEMP5(2),C_in=>C_OUT_B5(1),
                  S=>S_TEMP6(1),C_out=>C_OUT_B5(2));
            U_5_3:one_bit_adder port map(
                  A=>A_MULT_B6(3),B=>S_TEMP5(3),C_in=>C_OUT_B5(2),
                  S=>S_TEMP6(2),C_out=>C_OUT_B5(3));
            U_5_4:one_bit_adder port map(
                  A=>A_MULT_B6(4),B=>S_TEMP5(4),C_in=>C_OUT_B5(3),
                  S=>S_TEMP6(3),C_out=>C_OUT_B5(4));
            U_5_5:one_bit_adder port map(
                  A=>A_MULT_B6(5),B=>S_TEMP5(5),C_in=>C_OUT_B5(4),
                  S=>S_TEMP6(4),C_out=>C_OUT_B5(5));
            U_5_6:one_bit_adder port map(
                  A=>A_MULT_B6(6),B=>S_TEMP5(6),C_in=>C_OUT_B5(5),
                  S=>S_TEMP6(5),C_out=>C_OUT_B5(6));
            U_5_7:one_bit_adder port map(
                  A=>A_MULT_B6(7),B=>ZERO,C_in=>C_OUT_B5(6),
                  S=>S_TEMP6(6),C_out=>C_OUT_B5(7));

           U_6_0:one_bit_adder port map(
                  A=>A_MULT_B7(0),B=>S_TEMP6(0),C_in=>ZERO,
                  S=>C_TEMP(7),C_out=>C_OUT_B6(0));
            U_6_1:one_bit_adder port map(
                  A=>A_MULT_B7(1),B=>S_TEMP6(1),C_in=>C_OUT_B6(0),
                  S=>C_TEMP(8),C_out=>C_OUT_B6(1));
            U_6_2:one_bit_adder port map(
                  A=>A_MULT_B7(2),B=>S_TEMP6(2),C_in=>C_OUT_B6(1),
                  S=>C_TEMP(9),C_out=>C_OUT_B6(2));
            U_6_3:one_bit_adder port map(
                  A=>A_MULT_B7(3),B=>S_TEMP6(3),C_in=>C_OUT_B6(2),
                  S=>C_TEMP(10),C_out=>C_OUT_B6(3));
            U_6_4:one_bit_adder port map(
                  A=>A_MULT_B7(4),B=>S_TEMP6(4),C_in=>C_OUT_B6(3),
                  S=>C_TEMP(11),C_out=>C_OUT_B6(4));
            U_6_5:one_bit_adder port map(
                  A=>A_MULT_B7(5),B=>S_TEMP6(5),C_in=>C_OUT_B6(4),
                  S=>C_TEMP(12),C_out=>C_OUT_B6(5));
            U_6_6:one_bit_adder port map(
                  A=>A_MULT_B7(6),B=>S_TEMP6(6),C_in=>C_OUT_B6(5),
                  S=>C_TEMP(13),C_out=>C_OUT_B6(6));
            U_6_7:one_bit_adder port map(
                  A=>A_MULT_B7(7),B=>ZERO,C_in=>C_OUT_B6(6),
                  S=>C_TEMP(14),C_out=>C_OUT_B6(7));




                    
            

            A_MULT_B0(0) <=  A (0)and B (0);
            A_MULT_B0(1) <= A (1) and B (0);
            A_MULT_B0(2) <= A (2) and B (0);
            A_MULT_B0(3) <= A (3) and B (0);
            A_MULT_B0(4) <= A (4) and B (0);
            A_MULT_B0(5) <= A (5) and B (0);
            A_MULT_B0(6) <= A (6) and B (0);
            --A_MULT_B0(7) <= A (7) and B (0);--只做7位数据的乘法,以后所有的被注释掉的语句作用相同
            A_MULT_B0(7) <= '0';


            A_MULT_B1(0) <= A (0) and B (1);
            A_MULT_B1(1) <= A (1) and B (1);
            A_MULT_B1(2) <= A (2) and B (1);
            A_MULT_B1(3) <= A (3) and B (1);
            A_MULT_B1(4) <= A (4) and B (1);
            A_MULT_B1(5) <= A (5) and B (1);
            A_MULT_B1(6) <= A (6) and B (1);
            --A_MULT_B1(7) <= A (7) and B (1);
            A_MULT_B1(7) <= '0';


            A_MULT_B2(0) <= A (0) and B (2);
            A_MULT_B2(1) <= A (1) and B (2);
            A_MULT_B2(2) <= A (2) and B (2);
            A_MULT_B2(3) <= A (3) and B (2);
            A_MULT_B2(4) <= A (4) and B (2);
            A_MULT_B2(5) <= A (5) and B (2);
            A_MULT_B2(6) <= A (6) and B (2);
            --A_MULT_B2(7) <= A (7) and B (2);
            A_MULT_B2(7) <= '0';

            A_MULT_B3(0) <= A (0) and B (3);
            A_MULT_B3(1) <= A (1) and B (3);
            A_MULT_B3(2) <= A (2) and B (3);
            A_MULT_B3(3) <= A (3) and B (3);
            A_MULT_B3(4) <= A (4) and B (3);
            A_MULT_B3(5) <= A (5) and B (3);
            A_MULT_B3(6) <= A (6) and B (3);
            --A_MULT_B3(7) <= A (7) and B (3);
            A_MULT_B3(7) <= '0';


            A_MULT_B4(0) <= A (0) and B (4);
            A_MULT_B4(1) <= A (1) and B (4);
            A_MULT_B4(2) <= A (2) and B (4);
            A_MULT_B4(3) <= A (3) and B (4);
            A_MULT_B4(4) <= A (4) and B (4);
            A_MULT_B4(5) <= A (5) and B (4);
            A_MULT_B4(6) <= A (6) and B (4);
            --A_MULT_B4(7) <= A (7) and B (4);
            A_MULT_B4(7) <= '0';


            A_MULT_B5(0) <= A (0) and B (5);
            A_MULT_B5(1) <= A (1) and B (5);
            A_MULT_B5(2) <= A (2) and B (5);
            A_MULT_B5(3) <= A (3) and B (5);
            A_MULT_B5(4) <= A (4) and B (5);
            A_MULT_B5(5) <= A (5) and B (5);
            A_MULT_B5(6) <= A (6) and B (5);
            --A_MULT_B5(7) <= A (7) and B (0);
            A_MULT_B5(7) <= '0';


            A_MULT_B6(0) <= A (0) and B (6);
            A_MULT_B6(1) <= A (1) and B (6);
            A_MULT_B6(2) <= A (2) and B (6);
            A_MULT_B6(3) <= A (3) and B (6);
            A_MULT_B6(4) <= A (4) and B (6);
            A_MULT_B6(5) <= A (5) and B (6);
            A_MULT_B6(6) <= A (6) and B (6);
            --A_MULT_B6(7) <= A (7) and B (6);
            A_MULT_B6(7) <= '0';

            --A_MULT_B7(0) <= A (0) and B (7);
            --A_MULT_B7(1) <= A (1) and B (7);
            --A_MULT_B7(2) <= A (2) and B (7);
            --A_MULT_B7(3) <= A (3) and B (7);
            --A_MULT_B7(4) <= A (4) and B (7);
            --A_MULT_B7(5) <= A (5) and B (7);
            --A_MULT_B7(6) <= A (6) and B (7);
            --A_MULT_B7(7) <= A (7) and B (7);

            A_MULT_B7(0) <= '0';
            A_MULT_B7(1) <= '0';
            A_MULT_B7(2) <= '0';
            A_MULT_B7(3) <= '0';
            A_MULT_B7(4) <='0';
            A_MULT_B7(5) <= '0';
            A_MULT_B7(6) <='0';
            A_MULT_B7(7) <='0';


 
            ZERO <= '0';
            C_TEMP(0) <= A_MULT_B0(0);
            --C_TEMP(15) <= C_out_B6(7);
           -- C_TEMP(14 downto 7) <= S_TEMP6(5 downto 0);
           

            --C_TEMP(14) <= A(7) xor B(7);
            C_TEMP(15) <= A(7);--将载波的最高位作为乘法结果的最高位输出，这也是为了调幅的方便，以便于后续的判断

            data_out <= C_TEMP;

            end multi_arch;