counter_tbw.fdo

来自「Verilog编程」· FDO 代码 · 共 15 行

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Thu Apr 26 20:53:31 中国标准时间 2007
##
vlib work
vlog  counter.v
vlog  counter_tbw.tfw
vlog  "C:/Xilinx/verilog/src/glbl.v"
vsim -t 1ps  -L xilinxcorelib_ver -L unisims_ver  -lib work counter_tbw glbl
do counter_tbw.udo
view wave
add wave *
view structure
view signals
run -all