arm.fdo

来自「Verilog编程」· FDO 代码 · 共 17 行

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Sun May 06 09:28:58 中国标准时间 2007
##
vlib work
vlog  my_dcm1.v
vlog  rom.v
vlog  armtst.v
vlog  arm.tfw
vlog  C:/Xilinx/verilog/src/glbl.v
vsim -t 1ps  -L xilinxcorelib_ver -L unisims_ver  -lib work arm glbl
do arm.udo
view wave
add wave *
view structure
view signals
run -all