aa.stx

Verilog编程

Release 6.1i - xst G.23
Copyright (c) 1995-2003 Xilinx, Inc.  All rights reserved.
--> Parameter TMPDIR set to .
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--> WARNING:Xst:1885 - LSO file is empty, default list of libraries is used

=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling source file "aa.vf"
Module <aa> compiled
No errors in compilation
Analysis of file <aa.prj> succeeded.
 
CPU : 0.12 / 0.71 s | Elapsed : 1.00 / 1.00 s
 
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Total memory usage is 46636 kilobytes