tst.sym

Verilog编程

VERSION 5
BEGIN SYMBOL 
SYMBOLTYPE BLOCK
TIMESTAMP 2007 5 3 5 32 37
SYMATTR VeriModel "tst"
SYMPIN 0 -288 Input clk
SYMPIN 0 -224 Input A
SYMPIN 0 -160 Input WE
SYMPIN 0 -96 Input rst
SYMPIN 0 -32 Input DATA(27:0)
SYMPIN 384 -288 Output dout(13:0)
RECTANGLE N 64 -320 320 0 
BEGIN DISPLAY 192 -328 ATTR SymbolName
    ALIGNMENT BCENTER
    FONT 56 "Arial"
END DISPLAY
LINE N 64 -288 0 -288 
BEGIN DISPLAY 72 -288 PIN clk ATTR PinName
    FONT 24 "Arial"
END DISPLAY
LINE N 64 -224 0 -224 
BEGIN DISPLAY 72 -224 PIN A ATTR PinName
    FONT 24 "Arial"
END DISPLAY
LINE N 64 -160 0 -160 
BEGIN DISPLAY 72 -160 PIN WE ATTR PinName
    FONT 24 "Arial"
END DISPLAY
LINE N 64 -96 0 -96 
BEGIN DISPLAY 72 -96 PIN rst ATTR PinName
    FONT 24 "Arial"
END DISPLAY
LINE N 64 -32 0 -32 
BEGIN DISPLAY 72 -32 PIN DATA(27:0) ATTR PinName
    FONT 24 "Arial"
END DISPLAY
RECTANGLE N 0 -44 64 -20 
LINE N 320 -288 384 -288 
BEGIN DISPLAY 312 -288 PIN dout(13:0) ATTR PinName
    ALIGNMENT RIGHT
    FONT 24 "Arial"
END DISPLAY
RECTANGLE N 320 -300 384 -276 
END SYMBOL