dds1.stx

来自「Verilog编程」· STX 代码 · 共 26 行

Release 6.1i - xst G.23
Copyright (c) 1995-2003 Xilinx, Inc.  All rights reserved.
--> Parameter TMPDIR set to .
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--> WARNING:Xst:1885 - LSO file is empty, default list of libraries is used

=========================================================================
*                          HDL Compilation                              *
=========================================================================
WARNING:Xst:878 - rom1.v line 98: Unrecognized directive. Ignoring.
Compiling source file "rom1.v"
Module <rom1> compiled
Compiling source file "DDS1.v"
Module <DDS1> compiled
No errors in compilation
Analysis of file <DDS1.prj> succeeded.
 
CPU : 0.06 / 0.59 s | Elapsed : 0.00 / 1.00 s
 
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Total memory usage is 47716 kilobytes