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来自「Verilog编程」· MRP 代码 · 共 359 行 · 第 1/2 页
MRP
359 行
| DataIN<0> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<1> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<2> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<3> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<4> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<5> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<6> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<7> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<8> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<9> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<10> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<11> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<12> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<13> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<14> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || DataIN<15> | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | || NCS0_n | IOB | INPUT | LVCMOS25 | | | | PULLUP | || NWE_n | IOB | INPUT | LVCMOS25 | | | | PULLUP | || SINE1<0> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<1> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<2> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<3> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<4> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<5> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<6> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<7> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<8> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<9> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE1<10> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE2<0> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<1> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<2> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<3> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<4> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<5> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<6> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<7> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<8> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<9> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE2<10> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLDOWN | || SINE3<0> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<1> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<2> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<3> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<4> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<5> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<6> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<7> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<8> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<9> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE3<10> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<0> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<1> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<2> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<3> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<4> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<5> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<6> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<7> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<8> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<9> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE4<10> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<0> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<1> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<2> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<3> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<4> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<5> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<6> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<7> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<8> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<9> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE5<10> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<0> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<1> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<2> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<3> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<4> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<5> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<6> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<7> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<8> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<9> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || SINE6<10> | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | || addr<0> | IOB | INPUT | LVCMOS25 | | | | | || addr<1> | IOB | INPUT | LVCMOS25 | | | | | || addr<2> | IOB | INPUT | LVCMOS25 | | | | | || addr<3> | IOB | INPUT | LVCMOS25 | | | | | || addr<4> | IOB | INPUT | LVCMOS25 | | | | | || clk_out1 | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLUP | || clk_out2 | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLUP | || clk_out3 | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLUP | || clk_out4 | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLUP | || clk_out5 | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLUP | || clk_out6 | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | PULLUP | || clkin | IOB | INPUT | LVCMOS25 | | | | | || rst | IOB | INPUT | LVCMOS25 | | | | PULLDOWN | |+------------------------------------------------------------------------------------------------------------------------+Section 7 - RPMs----------------Section 8 - Guide Report------------------------Guide not run on this design.Section 9 - Area Group Summary------------------------------No area groups were found in this design.Section 10 - Modular Design Summary-----------------------------------Modular Design not used for this design.Section 11 - Timing Report--------------------------This design was not run using timing mode.Section 12 - Configuration String Details-----------------------------------------Use the "-detail" map option to print out Configuration StringsSection 13 - Additional Device Resource Counts----------------------------------------------Number of JTAG Gates for IOBs = 97Number of Equivalent Gates for Design = 447,247Number of RPM Macros = 0Number of Hard Macros = 0DCIRESETs = 0CAPTUREs = 0BSCANs = 0STARTUPs = 0DCMs = 1GCLKs = 3ICAPs = 018X18 Multipliers = 6Block RAMs = 6Total Registers (Flops & Latches in Slices & IOBs) not driven by LUTs = 1024IOB Dual-Rate Flops not driven by LUTs = 0IOB Dual-Rate Flops = 0IOB Slave Pads = 0IOB Master Pads = 0IOB Latches not driven by LUTs = 0IOB Latches = 0IOB Flip Flops not driven by LUTs = 0IOB Flip Flops = 0Unbonded IOBs = 0Bonded IOBs = 97Shift Registers = 0Static Shift Registers = 0Dynamic Shift Registers = 016x1 ROMs = 016x1 RAMs = 032x1 RAMs = 0Dual Port RAMs = 0MUXFXs = 240MULTANDs = 04 input LUTs used as Route-Thrus = 904 input LUTs = 1030Slice Latches not driven by LUTs = 0Slice Latches = 0Slice Flip Flops not driven by LUTs = 1024Slice Flip Flops = 1554SliceMs = 64SliceLs = 1076Slices = 1140Multiplier(17,17) = Number of LUT signals with 4 loads = 0Number of LUT signals with 3 loads = 0Number of LUT signals with 2 loads = 474Number of LUT signals with 1 load = 494NGM Average fanout of LUT = 3.95NGM Maximum fanout of LUT = 390NGM Average fanin for LUT = 2.3680Number of LUT symbols = 1030Number of IPAD symbols = 25Number of IBUF symbols = 25Number of DCM symbols = 1⌨️ 快捷键说明
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