dds_tbw.fdo

Verilog编程

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Wed Apr 23 11:01:02 中国标准时间 2008
##
vlib work
vlog  counter.v
vlog  rom1.v
vlog  DDS1.v
vlog  dds_tbw.tfw
vlog  "D:/Xilinx/verilog/src/glbl.v"
vsim -t 1ps  -L xilinxcorelib_ver -L unisims_ver  -lib work dds_tbw glbl
do dds_tbw.udo
view wave
add wave *
view structure
view signals
run -all