m2_0610.vho

在ALTERA公司的EPM570上实现的电机脉冲算法

SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella5~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella5~COUTCOUT1\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella6~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella6~COUTCOUT1\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[7]~1417\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[7]~1414_combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[7]~1468_combout\ : std_logic;
SIGNAL \inst34|lpm_and_component|and_node[0][1]~79_combout\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella7~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella8~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella8~COUTCOUT1\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella9~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella9~COUTCOUT1\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella10~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella10~COUTCOUT1\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella11~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella11~COUTCOUT1\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella12~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella13~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella13~COUTCOUT1\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella14~COUT\ : std_logic;
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella14~COUTCOUT1\ : std_logic;
SIGNAL \inst|lpm_decode_component|auto_generated|w_anode101w[1]~28_combout\ : std_logic;
SIGNAL \inst79|lpm_and_component|and_node[0][1]~92_combout\ : std_logic;
SIGNAL \inst79|lpm_and_component|and_node[0][1]~combout\ : std_logic;
SIGNAL \inst15~combout\ : std_logic;
SIGNAL \SIN~combout\ : std_logic;
SIGNAL \CIN6~combout\ : std_logic;
SIGNAL \inst78|lpm_and_component|and_node[0][1]~combout\ : std_logic;
SIGNAL \CIN5~combout\ : std_logic;
SIGNAL \inst31|lpm_and_component|and_node[0][1]~99_combout\ : std_logic;
SIGNAL \CIN4~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[3]~1445\ : std_logic;
SIGNAL \CIN3~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[2]~1451\ : std_logic;
SIGNAL \CIN2~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[1]~1457\ : std_logic;
SIGNAL \CIN1~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[0]~1463\ : std_logic;
SIGNAL \ADC_DATA~combout\ : std_logic;
SIGNAL \inst74|lpm_and_component|and_node[0][1]~46_combout\ : std_logic;
SIGNAL \inst71|lpm_and_component|and_node[0][1]~combout\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella7~COUT\ : std_logic;
SIGNAL \inst74|lpm_and_component|and_node[0][1]~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[0]~1464\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella8~COUT\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella8~COUTCOUT1\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[1]~1458\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella9~COUT\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella9~COUTCOUT1\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[2]~1452\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella10~COUT\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella10~COUTCOUT1\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[3]~1446\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella11~COUT\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella11~COUTCOUT1\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella12~COUT\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella13~COUT\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella13~COUTCOUT1\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella14~COUT\ : std_logic;
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella14~COUTCOUT1\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[7]~1425\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[3]~1447\ : std_logic;
SIGNAL \SERDY1~combout\ : std_logic;
SIGNAL \inst70|lpm_and_component|and_node[0][1]~combout\ : std_logic;
SIGNAL \inst62|lpm_and_component|and_node[0][1]~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[3]~1443\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[3]~1444\ : std_logic;
SIGNAL \HM1~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[2]~1449\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[2]~1450\ : std_logic;
SIGNAL \LMT_B~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[1]~1455\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[1]~1456\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[0]~1465\ : std_logic;
SIGNAL \LMT_A~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[0]~1461\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[0]~1462\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[1]~1459\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[2]~1453\ : std_logic;
SIGNAL \XIN~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[7]~1424_combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[7]~1426\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[7]~1427\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[7]~1406_combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[7]~1467_combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[6]~1429\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[6]~1431\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[6]~1430\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[6]~1428\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[6]~1432_combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[5]~1435\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[5]~1434\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[5]~1433\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[5]~1436\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[5]~1437_combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[4]~1439\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[4]~1440\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[4]~1438\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[4]~1441\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[4]~1442_combout\ : std_logic;
SIGNAL \ADC_CLK~combout\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[3]~1448\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[2]~1454\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[1]~1460\ : std_logic;
SIGNAL \inst77|lpm_bustri_component|dout[0]~1466\ : std_logic;
SIGNAL \inst23|lpm_or_component|or_node[0][1]~combout\ : std_logic;
SIGNAL \inst28|lpm_shiftreg_component|dffs\ : std_logic_vector(15 DOWNTO 0);
SIGNAL \inst35|inst|lpm_counter_component|auto_generated|safe_q\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst20|inst18|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst20|inst7|lpm_counter_component|auto_generated|safe_q\ : std_logic_vector(15 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|safe_q\ : std_logic_vector(15 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs\ : std_logic_vector(15 DOWNTO 0);
SIGNAL \inst|lpm_decode_component|auto_generated|w_anode108w\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \inst|lpm_decode_component|auto_generated|w_anode69w\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \inst38|lpm_ff_component|dffs\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst9|inst34|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst37|lpm_counter_component|auto_generated|safe_q\ : std_logic_vector(15 DOWNTO 0);
SIGNAL \inst61|inst|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL EE : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst54|lpm_ff_component|dffs\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst2|lpm_ff_component|dffs\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|safe_q\ : std_logic_vector(15 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs\ : std_logic_vector(15 DOWNTO 0);
SIGNAL \inst35|inst1|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst20|inst13|lpm_ff_component|dffs\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst20|inst12|lpm_ff_component|dffs\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst20|inst17|lpm_ff_component|dffs\ : std_logic_vector(15 DOWNTO 0);
SIGNAL \inst20|inst|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst20|inst16|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst20|inst14|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst39|lpm_ff_component|dffs\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst9|inst10|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst9|inst13|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst9|inst33|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst9|inst62|inst1|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst9|inst62|inst2|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst9|inst62|inst|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst9|inst|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst9|inst61|inst1|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst9|inst61|inst2|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst9|inst61|inst|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst61|inst1|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst61|inst2|lpm_ff_component|dffs\ : std_logic_vector(0 DOWNTO 0);
SIGNAL \inst39|lpm_ff_component|ALT_INV_dffs\ : std_logic_vector(2 DOWNTO 2);
SIGNAL \inst19|lpm_or_component|ALT_INV_or_node[0][1]~combout\ : std_logic;
SIGNAL \ALT_INV_CLKIN~combout\ : std_logic;
SIGNAL \ALT_INV_ADC_CLK~combout\ : std_logic;

BEGIN

XINT2 <= ww_XINT2;
ww_CLKIN <= CLKIN;
ww_QZ1 <= QZ1;
Test1 <= ww_Test1;
ww_QF1 <= QF1;
ww_QF2 <= QF2;
CO1 <= ww_CO1;
ww_WR <= WR;
ww_A14 <= A14;
ww_A15 <= A15;
ww_A0 <= A0;
ww_A1 <= A1;
ww_A2 <= A2;
ww_A3 <= A3;
ww_RD <= RD;
ww_LMT_A <= LMT_A;
ww_LMT_B <= LMT_B;
ww_HM1 <= HM1;
ww_SERDY1 <= SERDY1;
ww_CIN1 <= CIN1;
ww_CIN2 <= CIN2;
ww_CIN3 <= CIN3;
ww_CIN4 <= CIN4;
ww_CIN5 <= CIN5;
ww_CIN6 <= CIN6;
ww_SIN <= SIN;
ww_XIN <= XIN;
ww_ADC_CLK <= ADC_CLK;
ww_ADC_DATA <= ADC_DATA;
CO2 <= ww_CO2;
CO3 <= ww_CO3;
CO4 <= ww_CO4;
CO5 <= ww_CO5;
CO6 <= ww_CO6;
SON2 <= ww_SON2;
AL_CL2 <= ww_AL_CL2;
F2 <= ww_F2;
PUL <= ww_PUL;
TDRIB <= ww_TDRIB;
KIN <= ww_KIN;
SCL <= ww_SCL;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;
\inst39|lpm_ff_component|ALT_INV_dffs\(2) <= NOT \inst39|lpm_ff_component|dffs\(2);
\inst19|lpm_or_component|ALT_INV_or_node[0][1]~combout\ <= NOT \inst19|lpm_or_component|or_node[0][1]~combout\;
\ALT_INV_CLKIN~combout\ <= NOT \CLKIN~combout\;
\ALT_INV_ADC_CLK~combout\ <= NOT \ADC_CLK~combout\;

\inst37|lpm_counter_component|auto_generated|counter_cella5\ : maxii_lcell
-- Equation(s):
-- \inst37|lpm_counter_component|auto_generated|safe_q\(5) = DFFEAS(\inst37|lpm_counter_component|auto_generated|safe_q\(5) $ \inst37|lpm_counter_component|auto_generated|counter_cella4~COUT\, GLOBAL(\CLKIN~combout\), VCC, , , , , , )
-- \inst37|lpm_counter_component|auto_generated|counter_cella5~COUT\ = CARRY(!\inst37|lpm_counter_component|auto_generated|counter_cella4~COUT\ # !\inst37|lpm_counter_component|auto_generated|safe_q\(5))
-- \inst37|lpm_counter_component|auto_generated|counter_cella5~COUTCOUT1\ = CARRY(!\inst37|lpm_counter_component|auto_generated|counter_cella4~COUT\ # !\inst37|lpm_counter_component|auto_generated|safe_q\(5))

-- pragma translate_off
GENERIC MAP (
	cin_used => "true",
	lut_mask => "3c3f",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => \CLKIN~combout\,
	datab => \inst37|lpm_counter_component|auto_generated|safe_q\(5),
	aclr => GND,
	cin => \inst37|lpm_counter_component|auto_generated|counter_cella4~COUT\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \inst37|lpm_counter_component|auto_generated|safe_q\(5),
	cout0 => \inst37|lpm_counter_component|auto_generated|counter_cella5~COUT\,
	cout1 => \inst37|lpm_counter_component|auto_generated|counter_cella5~COUTCOUT1\);

\CLKIN~I\ : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_CLKIN,
	combout => \CLKIN~combout\);

\inst9|inst|lpm_ff_component|dffs[0]\ : maxii_lcell
-- Equation(s):
-- \inst9|inst|lpm_ff_component|dffs\(0) = DFFEAS(!\inst9|inst|lpm_ff_component|dffs\(0), \inst37|lpm_counter_component|auto_generated|safe_q\(3), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	lut_mask => "00ff",
	operation_mode => "normal",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => \inst37|lpm_counter_component|auto_generated|safe_q\(3),