fir.tan.summary

17阶FIR滤波器VHDL代码及说明文档 下载立即可以仿真

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 5.016 ns
From           : Din[4]
To             : add889:inst18|Dout[6]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 5.945 ns
From           : add888:inst44|Dout[7]
To             : Dout[7]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -3.323 ns
From           : Din[1]
To             : dff8:inst2|Dout[1]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 125.42 MHz ( period = 7.973 ns )
From           : dff89:inst34|Dout[0]
To             : mult242:inst40|Dout[14]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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