📄 controlb.vhd
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity ControlB is
port(
clk:in std_logic;
show:in std_logic:='1';
timeh,timel:out std_logic_vector(3 downto 0);
r,g,y,t:out std_logic
);
end ControlB;
architecture ControlB_arc of ControlB is
type color is(red,green,yellow,turn);
begin
process(clk,show)
variable reset:std_logic:='0';
variable tempr,tempg,tempy,tempt:std_logic;
variable temp_h,temp_l:std_logic_vector(3 downto 0);
variable temp_color:color:=red;
begin
if(clk'event and clk='1')then
case show is
when '0'=>
case temp_color is
when yellow=>
tempr:='0';
tempg:='0';
tempy:='1';
tempt:='0';
case reset is
when '0' =>
temp_h:="0000";
temp_l:="0100";
reset:='1';
when others =>
case temp_l is
when "0000"=>
temp_l:="1001";
temp_h:=temp_h-1;
when "0001"=>
case temp_h is
when "0000" =>
temp_h:="0000";
temp_l:="0000";
reset:='0';
temp_color:=red;
when others =>
temp_l:="0000";
end case;
when others=>
temp_l:=temp_l-1;
end case;
end case;
when green=>
tempr:='0';
tempg:='1';
tempy:='0';
tempt:='0';
case reset is
when '0' =>
temp_h:="0000";
temp_l:="1001";
reset:='1';
when others =>
case temp_l is
when "0000"=>
temp_l:="1001";
temp_h:=temp_h-1;
when "0001"=>
case temp_h is
when "0000" =>
temp_h:="0000";
temp_l:="0000";
reset:='0';
temp_color:=turn;
when others =>
temp_l:="0000";
end case;
when others=>
temp_l:=temp_l-1;
end case;
end case;
when red=>
tempr:='1';
tempg:='0';
tempy:='0';
tempt:='0';
case reset is
when '0' =>
temp_h:="0010";
temp_l:="0100";
reset:='1';
when others =>
case temp_l is
when "0000"=>
temp_l:="1001";
temp_h:=temp_h-1;
when "0001"=>
case temp_h is
when "0000" =>
temp_h:="0000";
temp_l:="0000";
reset:='0';
temp_color:=green;
when others =>
temp_l:="0000";
end case;
when others=>
temp_l:=temp_l-1;
end case;
end case;
when turn=>
tempr:='0';
tempg:='1';
tempy:='0';
tempt:='1';
case reset is
when '0' =>
temp_h:="0000";
temp_l:="1001";
reset:='1';
when others =>
case temp_l is
when "0000"=>
temp_l:="1001";
temp_h:=temp_h-1;
when "0001"=>
case temp_h is
when "0000" =>
temp_h:="0000";
temp_l:="0000";
reset:='0';
temp_color:=yellow;
when others =>
temp_l:="0000";
end case;
when others=>
temp_l:=temp_l-1;
end case;
end case;
end case;
when others=>
tempr:='1';
tempg:='0';
tempy:='0';
tempt:='0';
end case;
end if;
timeh<=temp_h;
timel<=temp_l;
r<=tempr;
g<=tempg;
y<=tempy;
t<=tempt;
end process;
end ;
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