📄 display.vhd
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library ieee;
use ieee.std_logic_1164.all;
entity Display is
port(
num_in:in std_logic_vector(3 downto 0);
num_out:out std_logic_vector(6 downto 0)
);
end Display;
architecture Display_arc of Display is
begin
process(num_in)
begin
case num_in is
when "0000"=>num_out<="0111111";
when "0001"=>num_out<="0000110";
when "0010"=>num_out<="1011011";
when "0011"=>num_out<="1001111";
when "0100"=>num_out<="1100110";
when "0101"=>num_out<="1101101";
when "0110"=>num_out<="1111101";
when "0111"=>num_out<="0100111";
when "1000"=>num_out<="1111111";
when "1001"=>num_out<="1101111";
when others=>num_out<="0000000";
end case;
end process;
end;
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