📄 debounce.vhd
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library ieee;
use ieee.std_logic_1164.all;
entity Debounce is
port(
key,clk: in std_logic;
key_out: out std_logic
);
end Debounce;
architecture Debounce_arc of Debounce is
signal temp1,temp2: std_logic;
begin
process(key,clk)
begin
if clk'event and clk='0' then
temp2<=temp1;
temp1<=key;
end if;
end process;
key_out<=temp1 and (not temp2) and clk;
end;
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