📄 vgaps2.map.rpt
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+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------+
+--------------------------------------------------------------------------------------------------------------------------+
; Source assignments for vgaCalc:u2|VgaInterface:u1|rom1:u1|altsyncram:altsyncram_component|altsyncram_3b31:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+------------------------------------------------------------+
+-----------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: vgaCalc:u2|VgaInterface:u1|rom1:u1|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+-----------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+-----------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; ROM ; Untyped ;
; WIDTH_A ; 1 ; Signed Integer ;
; WIDTHAD_A ; 16 ; Signed Integer ;
; NUMWORDS_A ; 65536 ; Signed Integer ;
; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 1 ; Untyped ;
; WIDTHAD_B ; 1 ; Untyped ;
; NUMWORDS_B ; 1 ; Untyped ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; picture.mif ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; DEVICE_FAMILY ; Cyclone ; Untyped ;
; CBXI_PARAMETER ; altsyncram_3b31 ; Untyped ;
+------------------------------------+----------------------+-----------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 6.1 Build 201 11/27/2006 SJ Full Version
Info: Processing started: Mon Jun 04 10:46:38 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off VGAps2 -c VGAps2
Info: Found 2 design units, including 1 entities, in source file BCD4Adder.vhd
Info: Found design unit 1: BCD4Adder-Impl
Info: Found entity 1: BCD4Adder
Info: Found 2 design units, including 1 entities, in source file Calc.vhd
Info: Found design unit 1: Calc-impl
Info: Found entity 1: Calc
Info: Found 2 design units, including 1 entities, in source file Complementor.vhd
Info: Found design unit 1: Complementor-Impl
Info: Found entity 1: Complementor
Info: Found 2 design units, including 1 entities, in source file F_Adder.vhd
Info: Found design unit 1: f_adder-fd1
Info: Found entity 1: F_Adder
Info: Found 2 design units, including 1 entities, in source file FourBitAdder.vhd
Info: Found design unit 1: FourBitAdder-Impl
Info: Found entity 1: FourBitAdder
Info: Found 2 design units, including 1 entities, in source file FourBitSuber.vhd
Info: Found design unit 1: FourBitSuber-Impl
Info: Found entity 1: FourBitSuber
Info: Found 2 design units, including 1 entities, in source file h_Adder.vhd
Info: Found design unit 1: h_adder-beh
Info: Found entity 1: h_adder
Info: Found 2 design units, including 1 entities, in source file MUX21A.vhd
Info: Found design unit 1: MUX21A-Impl
Info: Found entity 1: MUX21A
Info: Found 2 design units, including 1 entities, in source file or2a.vhd
Info: Found design unit 1: or2a-one
Info: Found entity 1: or2a
Info: Found 2 design units, including 1 entities, in source file rom1.vhd
Info: Found design unit 1: rom1-SYN
Info: Found entity 1: rom1
Info: Found 2 design units, including 1 entities, in source file rom.vhd
Info: Found design unit 1: rom-SYN
Info: Found entity 1: rom
Info: Found 2 design units, including 1 entities, in source file SubAdd.vhd
Info: Found design unit 1: SubAdd-Impl
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