vgaps2.map.eqn

用VHDL写的一个小游戏

--E1_op is vgaCalc:u2|Calc:u2|op
--operation mode is normal

E1_op_lut_out = E1L3 & calcdata[0] # !E1L3 & (E1_op);
E1_op = DFFEAS(E1_op_lut_out, clk50m, VCC, , E1L11, , , , );


--E1_va[3] is vgaCalc:u2|Calc:u2|va[3]
--operation mode is normal

E1_va[3]_lut_out = calcdata[3] # !E1_STX.st0 & !B1_feedback;
E1_va[3] = DFFEAS(E1_va[3]_lut_out, clk50m, VCC, , E1L03, , , , );


--E1_vb[3] is vgaCalc:u2|Calc:u2|vb[3]
--operation mode is normal

E1_vb[3]_lut_out = calcdata[3] # E1_STX.st2 & (!B1_feedback);
E1_vb[3] = DFFEAS(E1_vb[3]_lut_out, clk50m, VCC, , E1L73, , , , );


--E1_vb[1] is vgaCalc:u2|Calc:u2|vb[1]
--operation mode is normal

E1_vb[1]_lut_out = calcdata[1] # E1L4 & E1_STX.st2;
E1_vb[1] = DFFEAS(E1_vb[1]_lut_out, clk50m, VCC, , E1L73, , , , );


--E1_va[1] is vgaCalc:u2|Calc:u2|va[1]
--operation mode is normal

E1_va[1]_lut_out = calcdata[1] # E1L4 & (!E1_STX.st0);
E1_va[1] = DFFEAS(E1_va[1]_lut_out, clk50m, VCC, , E1L03, , , , );


--Q4L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|BCD4Adder:ua|FourBitAdder:u1|F_Adder:u2|h_adder:u2|so~50
--operation mode is normal

Q4L1 = E1_vb[1] $ E1_va[1] $ (E1_va[0] & E1_vb[0]);


--E1_vb[2] is vgaCalc:u2|Calc:u2|vb[2]
--operation mode is normal

E1_vb[2]_lut_out = calcdata[2] # E1L4 & E1_STX.st2;
E1_vb[2] = DFFEAS(E1_vb[2]_lut_out, clk50m, VCC, , E1L73, , , , );


--E1_va[2] is vgaCalc:u2|Calc:u2|va[2]
--operation mode is normal

E1_va[2]_lut_out = calcdata[2] # E1L4 & (!E1_STX.st0);
E1_va[2] = DFFEAS(E1_va[2]_lut_out, clk50m, VCC, , E1L03, , , , );


--R2L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|BCD4Adder:ua|FourBitAdder:u1|F_Adder:u2|or2a:u3|c~7
--operation mode is normal

R2L1 = E1_va[1] & (E1_vb[1] # E1_vb[0] & E1_va[0]) # !E1_va[1] & E1_vb[0] & E1_va[0] & E1_vb[1];


--R7L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|BCD4Adder:ua|FourBitAdder:u2|F_Adder:u3|or2a:u3|c~76
--operation mode is normal

R7L1 = Q4L1 # E1_vb[2] $ E1_va[2] $ R2L1;


--R3L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|BCD4Adder:ua|FourBitAdder:u1|F_Adder:u3|or2a:u3|c~72
--operation mode is normal

R3L1 = E1_vb[2] & (E1_va[2] # R2L1) # !E1_vb[2] & E1_va[2] & R2L1;


--L1L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|BCD4Adder:ua|six[2]~211
--operation mode is normal

L1L1 = E1_va[3] & (E1_vb[3] # R7L1 # R3L1) # !E1_va[3] & (E1_vb[3] & (R7L1 # R3L1) # !E1_vb[3] & R7L1 & R3L1);


--Q42L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|FourBitSuber:us|Complementor:u1|FourBitAdder:u|F_Adder:u4|h_adder:u2|so~0
--operation mode is normal

Q42L1 = E1_vb[3] $ (E1_vb[0] # E1_vb[2] # E1_vb[1]);


--R41_c is vgaCalc:u2|Calc:u2|SubAdd:u1|FourBitSuber:us|FourBitAdder:u2|F_Adder:u2|or2a:u3|c
--operation mode is normal

R41_c = E1_va[0] & (E1_vb[1] & E1_va[1] # !E1_vb[1] & (E1_vb[0])) # !E1_va[0] & E1_va[1] & (E1_vb[0] $ E1_vb[1]);


--Q02_co is vgaCalc:u2|Calc:u2|SubAdd:u1|FourBitSuber:us|Complementor:u1|FourBitAdder:u|F_Adder:u2|h_adder:u2|co
--operation mode is normal

Q02_co = E1_vb[0] # E1_vb[1];


--R51_c is vgaCalc:u2|Calc:u2|SubAdd:u1|FourBitSuber:us|FourBitAdder:u2|F_Adder:u3|or2a:u3|c
--operation mode is normal

R51_c = E1_va[2] & (R41_c # E1_vb[2] $ Q02_co) # !E1_va[2] & R41_c & (E1_vb[2] $ Q02_co);


--R61_c is vgaCalc:u2|Calc:u2|SubAdd:u1|FourBitSuber:us|FourBitAdder:u2|F_Adder:u4|or2a:u3|c
--operation mode is normal

R61_c = E1_va[3] & (Q42L1 # R51_c) # !E1_va[3] & Q42L1 & R51_c;


--E1L21 is vgaCalc:u2|Calc:u2|Q[1]~1208
--operation mode is normal

E1L21 = E1_vb[1] $ E1_va[1];


--E1L31 is vgaCalc:u2|Calc:u2|Q[1]~1209
--operation mode is normal

E1L31 = R61_c & (E1L21 $ (!E1_va[0] & E1_vb[0])) # !R61_c & E1_va[0];


--E1L41 is vgaCalc:u2|Calc:u2|Q[1]~1210
--operation mode is normal

E1L41 = E1_op & Q4L1 & (!R61_c) # !E1_op & (Q4L1 $ L1L1);


--Q63_co is vgaCalc:u2|Calc:u2|SubAdd:u1|FourBitSuber:us|Complementor:u3|FourBitAdder:u|F_Adder:u2|h_adder:u2|co
--operation mode is normal

Q63_co = E1_va[0] & (E1_vb[1] $ E1_va[1] # !E1_vb[0]) # !E1_va[0] & (E1_vb[0] # E1_vb[1] $ E1_va[1]);


--Q92L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|FourBitSuber:us|FourBitAdder:u2|F_Adder:u3|h_adder:u1|so~0
--operation mode is normal

Q92L1 = E1_vb[2] $ E1_va[2] $ (E1_vb[0] # E1_vb[1]);


--Q83_co is vgaCalc:u2|Calc:u2|SubAdd:u1|FourBitSuber:us|Complementor:u3|FourBitAdder:u|F_Adder:u3|h_adder:u2|co
--operation mode is normal

Q83_co = Q63_co # Q92L1 $ R41_c;


--E1L61 is vgaCalc:u2|Calc:u2|Q[3]~1214
--operation mode is normal

E1L61 = Q83_co & (E1_va[3] & Q42L1 & R51_c # !E1_va[3] & !Q42L1 & !R51_c) # !Q83_co & (E1_va[3] $ Q42L1 $ R51_c);


--Q61L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|BCD4Adder:ua|FourBitAdder:u2|F_Adder:u4|h_adder:u2|so~0
--operation mode is normal

Q61L1 = E1_va[3] & (E1_vb[3] $ R3L1 $ !R7L1) # !E1_va[3] & (E1_vb[3] & (R3L1 $ !R7L1) # !E1_vb[3] & R3L1 & !R7L1);


--E1L51 is vgaCalc:u2|Calc:u2|Q[2]~1218
--operation mode is normal

E1L51 = Q92L1 $ R41_c $ (Q63_co & !R61_c);


--Q6L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|BCD4Adder:ua|FourBitAdder:u1|F_Adder:u3|h_adder:u2|so~23
--operation mode is normal

Q6L1 = E1_vb[2] $ E1_va[2] $ R2L1;


--Q41L1 is vgaCalc:u2|Calc:u2|SubAdd:u1|BCD4Adder:ua|FourBitAdder:u2|F_Adder:u3|h_adder:u2|so~61
--operation mode is normal

Q41L1 = Q6L1 $ (!Q4L1 & (L1L1));


--E1_opout[2] is vgaCalc:u2|Calc:u2|opout[2]
--operation mode is normal

E1_opout[2]_lut_out = !E1L3 & !E1_STX.st2;
E1_opout[2] = DFFEAS(E1_opout[2]_lut_out, clk50m, VCC, , E1L9, , , , );


--B1_feedback is Readkey:u1|feedback
--operation mode is normal

B1_feedback_lut_out = B1_feedback & (B1_stat[0] # B1_stat[2] # !B1_stat[1]) # !B1_feedback & B1_stat[0] & !B1_stat[2] & !B1_stat[1];
B1_feedback = DFFEAS(B1_feedback_lut_out, !B1_ps_clk, VCC, , B1L43, , , , );


--calcdata[3] is calcdata[3]
--operation mode is normal

calcdata[3]_lut_out = A1L41;
calcdata[3] = DFFEAS(calcdata[3]_lut_out, B1_feedback, VCC, , A1L11, , , , );


--calcdata[2] is calcdata[2]
--operation mode is normal

calcdata[2]_lut_out = A1L21 & (A1L5 & (!shiftflag) # !A1L5 & A1L71);
calcdata[2] = DFFEAS(calcdata[2]_lut_out, B1_feedback, VCC, , A1L11, , , , );


--calcdata[1] is calcdata[1]
--operation mode is normal

calcdata[1]_lut_out = A1L02 & !B1L42 & !B1L52 & !A1L33;
calcdata[1] = DFFEAS(calcdata[1]_lut_out, B1_feedback, VCC, , A1L11, , , , );


--E1L2 is vgaCalc:u2|Calc:u2|COMREG~142
--operation mode is normal

E1L2 = B1_feedback & calcdata[3] & calcdata[2] & !calcdata[1];


--calcdata[0] is calcdata[0]
--operation mode is normal

calcdata[0]_lut_out = !A1L33 & (B1L42 # B1L52 # A1L32);
calcdata[0] = DFFEAS(calcdata[0]_lut_out, B1_feedback, VCC, , A1L11, , , , );


--E1L71 is vgaCalc:u2|Calc:u2|Select~995
--operation mode is normal

E1L71 = E1_STX.st3 & E1L2 & (!calcdata[0]);


--E1L81 is vgaCalc:u2|Calc:u2|Select~996
--operation mode is normal

E1L81 = E1_STX.st4 & calcdata[0] & E1L2;


--E1L3 is vgaCalc:u2|Calc:u2|COMREG~143
--operation mode is normal

E1L3 = B1_feedback & calcdata[3] & calcdata[1] & !calcdata[2];


--E1L91 is vgaCalc:u2|Calc:u2|Select~997
--operation mode is normal

E1L91 = E1_STX.st1 & E1L3;


--E1_STX.st2 is vgaCalc:u2|Calc:u2|STX.st2
--operation mode is normal

E1_STX.st2_lut_out = !E1L71 & !E1L81 & (E1L91 # E1L83);
E1_STX.st2 = DFFEAS(E1_STX.st2_lut_out, clk50m, !reset, , , , , , );


--E1L4 is vgaCalc:u2|Calc:u2|COMREG~144
--operation mode is normal

E1L4 = calcdata[3] & (calcdata[1] # calcdata[2]) # !B1_feedback;


--E1L02 is vgaCalc:u2|Calc:u2|Select~998
--operation mode is normal

E1L02 = !E1L4 & (E1_STX.st2 # !E1_STX.st0);


--E1L12 is vgaCalc:u2|Calc:u2|Select~999
--operation mode is normal

E1L12 = E1L71 # E1L81 # E1L91 # E1L02;


--E1L03 is vgaCalc:u2|Calc:u2|va[0]~268
--operation mode is normal

E1L03 = !reset & (E1_STX.st1 & !E1L4 # !E1_STX.st1 & (!E1_STX.st0));


--E1L63 is vgaCalc:u2|Calc:u2|vb[0]~324
--operation mode is normal

E1L63 = E1L3 # !E1_STX.st2;


--E1L73 is vgaCalc:u2|Calc:u2|vb[0]~325
--operation mode is normal

E1L73 = !reset & (!E1L4 & E1_STX.st3 # !E1L63);


--E1L1 is vgaCalc:u2|Calc:u2|COMREG~6
--operation mode is normal

E1L1 = E1L2 & (!calcdata[0]);


--E1L8 is vgaCalc:u2|Calc:u2|opout[0]~171
--operation mode is normal

E1L8 = !E1L4 # !E1_STX.st1;


--E1L9 is vgaCalc:u2|Calc:u2|opout[0]~172
--operation mode is normal

E1L9 = !reset & (E1L3 & E1_STX.st2 # !E1L8);


--E1L22 is vgaCalc:u2|Calc:u2|Select~1003
--operation mode is normal

E1L22 = E1L4 & E1_STX.st1 # !E1L4 & !E1_STX.st2 & (E1_STX.st1 # !E1_STX.st0);


--E1L11 is vgaCalc:u2|Calc:u2|op~177
--operation mode is normal

E1L11 = !reset & (E1_STX.st2 & E1L4 # !E1_STX.st2 & (E1_STX.st1));


--B1_stat[0] is Readkey:u1|stat[0]
--operation mode is normal

B1_stat[0]_lut_out = !B1_stat[0] & (B1_stat[2] # !B1_stat[3] # !B1_stat[1]);
B1_stat[0] = DFFEAS(B1_stat[0]_lut_out, !B1_ps_clk, VCC, , , , , , );


--B1_stat[2] is Readkey:u1|stat[2]
--operation mode is normal

B1_stat[2]_lut_out = B1_stat[2] $ (B1_stat[0] & B1_stat[1]);
B1_stat[2] = DFFEAS(B1_stat[2]_lut_out, !B1_ps_clk, VCC, , , , , , );


--B1_stat[1] is Readkey:u1|stat[1]
--operation mode is normal

B1_stat[1]_lut_out = B1_stat[0] & (!B1_stat[1]) # !B1_stat[0] & B1_stat[1] & (B1_stat[2] # !B1_stat[3]);
B1_stat[1] = DFFEAS(B1_stat[1]_lut_out, !B1_ps_clk, VCC, , , , , , );


--B1_ps_clk is Readkey:u1|ps_clk
--operation mode is normal

B1_ps_clk_lut_out = kbclk;
B1_ps_clk = DFFEAS(B1_ps_clk_lut_out, B1_clk_6m, VCC, , , , , , );


--B1_stat[3] is Readkey:u1|stat[3]
--operation mode is normal

B1_stat[3]_lut_out = B1_stat[1] & (B1_stat[0] & (B1_stat[2] $ B1_stat[3]) # !B1_stat[0] & B1_stat[2] & B1_stat[3]) # !B1_stat[1] & (B1_stat[3]);
B1_stat[3] = DFFEAS(B1_stat[3]_lut_out, !B1_ps_clk, VCC, , , , , , );


--B1L43 is Readkey:u1|tempenable~88
--operation mode is normal

B1L43 = B1_stat[3] & (B1_stat[0] # B1_stat[2] # B1_stat[1]);


--B1_tempcode[4] is Readkey:u1|tempcode[4]
--operation mode is normal

B1_tempcode[4]_lut_out = B1_ps_data;
B1_tempcode[4] = DFFEAS(B1_tempcode[4]_lut_out, !B1_ps_clk, VCC, , B1L21, , , , );


--B1_tempcode[1] is Readkey:u1|tempcode[1]
--operation mode is normal

B1_tempcode[1]_lut_out = B1_ps_data;
B1_tempcode[1] = DFFEAS(B1_tempcode[1]_lut_out, !B1_ps_clk, VCC, , B1L9, , , , );


--B1_tempcode[7] is Readkey:u1|tempcode[7]
--operation mode is normal

B1_tempcode[7]_lut_out = B1_ps_data;
B1_tempcode[7] = DFFEAS(B1_tempcode[7]_lut_out, !B1_ps_clk, VCC, , B1L33, , , , );


--B1_tempcode[0] is Readkey:u1|tempcode[0]
--operation mode is normal

B1_tempcode[0]_lut_out = B1_ps_data;
B1_tempcode[0] = DFFEAS(B1_tempcode[0]_lut_out, !B1_ps_clk, VCC, , B1L8, , , , );


--B1L22 is Readkey:u1|tempcode[2]~469
--operation mode is normal

B1L22 = B1_tempcode[1] & (!B1_tempcode[7] & !B1_tempcode[0]);


--B1_tempcode[5] is Readkey:u1|tempcode[5]
--operation mode is normal

B1_tempcode[5]_lut_out = B1_ps_data;
B1_tempcode[5] = DFFEAS(B1_tempcode[5]_lut_out, !B1_ps_clk, VCC, , B1L92, , , , );


--B1_tempcode[2] is Readkey:u1|tempcode[2]
--operation mode is normal

B1_tempcode[2]_lut_out = B1_ps_data;
B1_tempcode[2] = DFFEAS(B1_tempcode[2]_lut_out, !B1_ps_clk, VCC, , B1L01, , , , );


--B1_tempcode[3] is Readkey:u1|tempcode[3]
--operation mode is normal

B1_tempcode[3]_lut_out = B1_ps_data;
B1_tempcode[3] = DFFEAS(B1_tempcode[3]_lut_out, !B1_ps_clk, VCC, , B1L11, , , , );


--B1_tempcode[6] is Readkey:u1|tempcode[6]
--operation mode is normal

B1_tempcode[6]_lut_out = B1_ps_data;
B1_tempcode[6] = DFFEAS(B1_tempcode[6]_lut_out, !B1_ps_clk, VCC, , B1L13, , , , );


--A1L82 is process0~910
--operation mode is normal

A1L82 = B1_tempcode[5] & !B1_tempcode[2] & !B1_tempcode[3] & B1_tempcode[6] # !B1_tempcode[5] & B1_tempcode[2] & B1_tempcode[3] & !B1_tempcode[6];


--A1L92 is process0~911
--operation mode is normal

A1L92 = B1_tempcode[4] & B1L22 & A1L82;


--B1L32 is Readkey:u1|tempcode[2]~470
--operation mode is normal

B1L32 = B1_tempcode[2] & (!B1_tempcode[6] & !B1_tempcode[3]);


--B1L42 is Readkey:u1|tempcode[2]~471
--operation mode is normal

B1L42 = B1_tempcode[4] & B1L22 & B1L32 & !B1_tempcode[5];


--A1L03 is process0~912
--operation mode is normal

A1L03 = B1_tempcode[5] & (!B1_tempcode[7]);