qdjb.vhd

四人抢答器

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY QDJB IS
 PORT(CLR:IN STD_LOGIC;
      A,B,C,D:IN STD_LOGIC;
      A1,B1,C1,D1:OUT STD_LOGIC;
      STATES:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
      SPEAKER:OUT STD_LOGIC);
END ENTITY QDJB;
ARCHITECTURE ART OF QDJB IS
   CONSTANT W1:STD_LOGIC_VECTOR:="0001";
   CONSTANT W2:STD_LOGIC_VECTOR:="0010";
   CONSTANT W3:STD_LOGIC_VECTOR:="0011";
   CONSTANT W4:STD_LOGIC_VECTOR:="0100";
BEGIN
PROCESS(CLR,A,B,C,D)IS
BEGIN
 IF CLR='1'THEN STATES<="0000";SPEAKER<='0';
 ELSIF(A='1'AND B='0'AND C='0'AND D='0')THEN
   A1<='1';B1<='0';C1<='0';D1<='0';SPEAKER<='1';STATES<=W1;
 ELSIF(A='0'AND B='1'AND C='0'AND D='0')THEN
   A1<='0';B1<='1';C1<='0';D1<='0';SPEAKER<='1';STATES<=W2;
 ELSIF(A='0'AND B='0'AND C='1'AND D='0')THEN
   A1<='0';B1<='0';C1<='1';D1<='0';SPEAKER<='1';STATES<=W3;
 ELSIF(A='0'AND B='0'AND C='0'AND D='1')THEN
   A1<='0';B1<='0';C1<='0';D1<='1';SPEAKER<='1';STATES<=W4;
 ELSIF(A='0'AND B='0'AND C='0'AND D='0')THEN
   A1<='0';B1<='0';C1<='0';D1<='0';
END IF;
END PROCESS;
END ARCHITECTURE ART;