ps2tolcd.map.qmsg

ps/2键盘输入

{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(118) " "Warning: Verilog HDL assignment warning at lcd.v(118): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 118 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(120) " "Warning: Verilog HDL assignment warning at lcd.v(120): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 120 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(122) " "Warning: Verilog HDL assignment warning at lcd.v(122): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 122 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(124) " "Warning: Verilog HDL assignment warning at lcd.v(124): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 124 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(127) " "Warning: Verilog HDL assignment warning at lcd.v(127): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 127 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(130) " "Warning: Verilog HDL assignment warning at lcd.v(130): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 130 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(133) " "Warning: Verilog HDL assignment warning at lcd.v(133): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 133 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 lcd.v(135) " "Warning: Verilog HDL assignment warning at lcd.v(135): truncated value with size 32 to match size of target (7)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 135 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(139) " "Warning: Verilog HDL assignment warning at lcd.v(139): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 139 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(140) " "Warning: Verilog HDL assignment warning at lcd.v(140): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 140 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_ALWAYS_ID_HOLDS_VALUE" "data_in_buf lcd.v(93) " "Warning: Verilog HDL Always Construct warning at lcd.v(93): variable \"data_in_buf\" may not be assigned a new value in every possible path through the Always Construct.  Variable \"data_in_buf\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 93 0 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd_rw~reg0 data_in GND " "Warning: Reduced register \"lcd_rw~reg0\" with stuck data_in port to stuck value GND" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 4 -1 0 } }  } 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT" "\|lcd\|state 10 0 " "Info: State machine \"\|lcd\|state\" contains 10 states and 0 state bits" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|lcd\|state " "Info: Selected Auto state machine encoding method for state machine \"\|lcd\|state\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|lcd\|state " "Info: Encoding result for state machine \"\|lcd\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "10 " "Info: Completed encoding using 10 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.IDLE " "Info: Encoded state bit \"state.IDLE\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.WRITERAM " "Info: Encoded state bit \"state.WRITERAM\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.SETDDRAM " "Info: Encoded state bit \"state.SETDDRAM\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.SETCGRAM " "Info: Encoded state bit \"state.SETCGRAM\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.SETFUNCTION " "Info: Encoded state bit \"state.SETFUNCTION\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.SHIFT " "Info: Encoded state bit \"state.SHIFT\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.SWITCHMODE " "Info: Encoded state bit \"state.SWITCHMODE\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.SETMODE " "Info: Encoded state bit \"state.SETMODE\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.RETURNCURSOR " "Info: Encoded state bit \"state.RETURNCURSOR\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.CLEAR " "Info: Encoded state bit \"state.CLEAR\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0}  } {  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.IDLE 0000000000 " "Info: State \"\|lcd\|state.IDLE\" uses code string \"0000000000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.SWITCHMODE 1000001000 " "Info: State \"\|lcd\|state.SWITCHMODE\" uses code string \"1000001000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.WRITERAM 1100000000 " "Info: State \"\|lcd\|state.WRITERAM\" uses code string \"1100000000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.RETURNCURSOR 1000000010 " "Info: State \"\|lcd\|state.RETURNCURSOR\" uses code string \"1000000010\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.SETDDRAM 1010000000 " "Info: State \"\|lcd\|state.SETDDRAM\" uses code string \"1010000000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.SETMODE 1000000100 " "Info: State \"\|lcd\|state.SETMODE\" uses code string \"1000000100\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.CLEAR 1000000001 " "Info: State \"\|lcd\|state.CLEAR\" uses code string \"1000000001\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.SHIFT 1000010000 " "Info: State \"\|lcd\|state.SHIFT\" uses code string \"1000010000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.SETFUNCTION 1000100000 " "Info: State \"\|lcd\|state.SETFUNCTION\" uses code string \"1000100000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd\|state.SETCGRAM 1001000000 " "Info: State \"\|lcd\|state.SETCGRAM\" uses code string \"1001000000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0}  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 9 -1 0 } }  } 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "lcd_rw GND " "Warning: Pin \"lcd_rw\" stuck at GND" {  } { { "../SRC/lcd.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/PS2_LCD/SRC/lcd.v" 4 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "115 " "Info: Implemented 115 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "10 " "Info: Implemented 10 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "11 " "Info: Implemented 11 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "94 " "Info: Implemented 94 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 25 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 25 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Mar 27 23:33:06 2008 " "Info: Processing ended: Thu Mar 27 23:33:06 2008" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0}  } {  } 0}