ps2_keyboard_interface.fit.qmsg

实现PS/2接口与RS-232接口的数据传输

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version " "Info: Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 14 22:29:19 2006 " "Info: Processing started: Thu Sep 14 22:29:19 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off KEYBAORD -c ps2_keyboard_interface " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off KEYBAORD -c ps2_keyboard_interface" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "ps2_keyboard_interface EP1C12Q240C8 " "Info: Selected device EP1C12Q240C8 for design \"ps2_keyboard_interface\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C6Q240C8 " "Info: Device EP1C6Q240C8 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "6 15 " "Info: No exact pin location assignment(s) for 6 pins of 15 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "rx_read " "Info: Pin rx_read not assigned to an exact location on the device" {  } { { "ps2_keyboard.bdf" "" { Schematic "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard.bdf" { { 104 24 192 120 "rx_read" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rx_read" } } } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" "" { Report "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" Compiler "ps2_keyboard_interface" "UNKNOWN" "V1" "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/KEYBAORD.quartus_db" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/" "" "" { rx_read } "NODE_NAME" } "" } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" "" { rx_read } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "tx_write " "Info: Pin tx_write not assigned to an exact location on the device" {  } { { "ps2_keyboard.bdf" "" { Schematic "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard.bdf" { { 208 800 976 224 "tx_write" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "tx_write" } } } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" "" { Report "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" Compiler "ps2_keyboard_interface" "UNKNOWN" "V1" "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/KEYBAORD.quartus_db" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/" "" "" { tx_write } "NODE_NAME" } "" } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" "" { tx_write } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "rx_ascii\[7\] " "Info: Pin rx_ascii\[7\] not assigned to an exact location on the device" {  } { { "ps2_keyboard.bdf" "" { Schematic "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard.bdf" { { 176 792 968 192 "rx_ascii\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rx_ascii\[7\]" } } } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" "" { Report "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" Compiler "ps2_keyboard_interface" "UNKNOWN" "V1" "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/KEYBAORD.quartus_db" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/" "" "" { rx_ascii[7] } "NODE_NAME" } "" } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" "" { rx_ascii[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "rx_ascii\[6\] " "Info: Pin rx_ascii\[6\] not assigned to an exact location on the device" {  } { { "ps2_keyboard.bdf" "" { Schematic "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard.bdf" { { 176 792 968 192 "rx_ascii\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rx_ascii\[6\]" } } } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" "" { Report "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" Compiler "ps2_keyboard_interface" "UNKNOWN" "V1" "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/KEYBAORD.quartus_db" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/" "" "" { rx_ascii[6] } "NODE_NAME" } "" } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" "" { rx_ascii[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "rx_ascii\[5\] " "Info: Pin rx_ascii\[5\] not assigned to an exact location on the device" {  } { { "ps2_keyboard.bdf" "" { Schematic "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard.bdf" { { 176 792 968 192 "rx_ascii\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rx_ascii\[5\]" } } } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" "" { Report "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" Compiler "ps2_keyboard_interface" "UNKNOWN" "V1" "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/KEYBAORD.quartus_db" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/" "" "" { rx_ascii[5] } "NODE_NAME" } "" } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" "" { rx_ascii[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "rx_ascii\[4\] " "Info: Pin rx_ascii\[4\] not assigned to an exact location on the device" {  } { { "ps2_keyboard.bdf" "" { Schematic "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard.bdf" { { 176 792 968 192 "rx_ascii\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rx_ascii\[4\]" } } } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" "" { Report "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/ps2_keyboard_interface_cmp.qrpt" Compiler "ps2_keyboard_interface" "UNKNOWN" "V1" "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/db/KEYBAORD.quartus_db" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/" "" "" { rx_ascii[4] } "NODE_NAME" } "" } } { "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" { Floorplan "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard_interface.fld" "" "" { rx_ascii[4] } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources." {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "mclk Global clock in PIN 153 " "Info: Automatically promoted signal \"mclk\" to use Global clock in PIN 153" {  } { { "ps2_keyboard.bdf" "" { Schematic "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/ps2_keyboard.bdf" { { 72 24 192 88 "mclk" "" } } } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "div_256:inst1\|clk Global clock " "Info: Automatically promoted signal \"div_256:inst1\|clk\" to use Global clock" {  } { { "div_256.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Proj/div_256.v" 5 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "div_4:inst2\|acc\[12\] Global clock " "Info: Automatically promoted signal \"div_4:inst2\|acc\[12\]\" to use Global clock" {  } { { "../src/ref2/div_4.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/div_4.v" 5 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "uart_if:inst3\|cnt\[3\] Global clock " "Info: Automatically promoted some destinations of signal \"uart_if:inst3\|cnt\[3\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_if:inst3\|cnt\[3\] " "Info: Destination \"uart_if:inst3\|cnt\[3\]\" may be non-global or may not use global clock" {  } { { "../src/ref2/uart_if.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/uart_if.v" 27 -1 0 } }  } 0}  } { { "../src/ref2/uart_if.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/uart_if.v" 27 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "uart_if:inst3\|uart:U1\|rcvr:u1\|clkdiv\[3\] Global clock " "Info: Automatically promoted some destinations of signal \"uart_if:inst3\|uart:U1\|rcvr:u1\|clkdiv\[3\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_if:inst3\|uart:U1\|rcvr:u1\|clkdiv\[3\] " "Info: Destination \"uart_if:inst3\|uart:U1\|rcvr:u1\|clkdiv\[3\]\" may be non-global or may not use global clock" {  } { { "../src/ref2/rcvr.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/rcvr.v" 37 -1 0 } }  } 0}  } { { "../src/ref2/rcvr.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/rcvr.v" 37 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "uart_if:inst3\|uart:U1\|txmit:u2\|clkdiv\[3\] Global clock " "Info: Automatically promoted some destinations of signal \"uart_if:inst3\|uart:U1\|txmit:u2\|clkdiv\[3\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_if:inst3\|uart:U1\|txmit:u2\|clkdiv\[3\] " "Info: Destination \"uart_if:inst3\|uart:U1\|txmit:u2\|clkdiv\[3\]\" may be non-global or may not use global clock" {  } { { "../src/ref2/txmit.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/txmit.v" 31 -1 0 } }  } 0}  } { { "../src/ref2/txmit.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/txmit.v" 31 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "uart_if:inst3\|wrn Global clock " "Info: Automatically promoted some destinations of signal \"uart_if:inst3\|wrn\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_if:inst3\|uart:U1\|txmit:u2\|wrn1 " "Info: Destination \"uart_if:inst3\|uart:U1\|txmit:u2\|wrn1\" may be non-global or may not use global clock" {  } { { "../src/ref2/txmit.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/txmit.v" 35 -1 0 } }  } 0}  } { { "../src/ref2/uart_if.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/uart_if.v" 17 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "ps2_keyboard_interface:inst\|rx_released Global clock " "Info: Automatically promoted some destinations of signal \"ps2_keyboard_interface:inst\|rx_released\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_if:inst3\|uart:U1\|txmit:u2\|no_bits_sent~0 " "Info: Destination \"uart_if:inst3\|uart:U1\|txmit:u2\|no_bits_sent~0\" may be non-global or may not use global clock" {  } { { "../src/ref2/txmit.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/txmit.v" 34 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_if:inst3\|read_once " "Info: Destination \"uart_if:inst3\|read_once\" may be non-global or may not use global clock" {  } { { "../src/ref2/uart_if.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/uart_if.v" 25 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_if:inst3\|uart:U1\|rcvr:u1\|data_ready~0 " "Info: Destination \"uart_if:inst3\|uart:U1\|rcvr:u1\|data_ready~0\" may be non-global or may not use global clock" {  } { { "../src/ref2/rcvr.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/rcvr.v" 30 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "uart_if:inst3\|uart:U1\|rcvr:u1\|no_bits_rcvd~0 " "Info: Destination \"uart_if:inst3\|uart:U1\|rcvr:u1\|no_bits_rcvd~0\" may be non-global or may not use global clock" {  } { { "../src/ref2/rcvr.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/src/ref2/rcvr.v" 40 -1 0 } }  } 0}  } { { "../Src/ref2/ps2_keyboard.v" "" { Text "E:/EDA/cdrom/ALTERA/NIOS II开发板/HSNISO V3.2/EP1C12/PS2_RS232/Src/ref2/ps2_keyboard.v" 188 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}