led.vhd

这是一些经典的vhdl example

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY led IS
PORT(
		clk       	: IN	STD_LOGIC;                      --全局时钟
		ena			: IN    STD_LOGIC_VECTOR(5 DOWNTO 0);
		flicker_ena : IN    STD_LOGIC_VECTOR(5 DOWNTO 0);
		data		: IN    STD_LOGIC_VECTOR(29 DOWNTO 0);
		ld 			: IN	STD_LOGIC;
		sdata		: IN    STD_LOGIC_VECTOR(4 DOWNTO 0);
		addr		: IN    STD_LOGIC_VECTOR(2 DOWNTO 0);
		wr			: IN    STD_LOGIC;
		dout		: OUT   STD_LOGIC_VECTOR(6 DOWNTO 0);
		dp          : OUT   STD_LOGIC);
END led;
ARCHITECTURE rtl OF led IS
	COMPONENT led_clk_gen
		PORT(
			clk       	: IN	STD_LOGIC;                      --全局时钟
			clk_scan    : BUFFER STD_LOGIC;                      --扫描时钟
			CLK_flicker : OUT	STD_LOGIC);                       --闪烁时钟
	END COMPONENT;

	COMPONENT ledscan
		PORT(
			clk_scan	: IN	STD_LOGIC;                       --扫描时钟，周期300HZ
			ledaddr		: OUT	STD_LOGIC_VECTOR(2 DOWNTO 0);    --当前显示LED的地址，用于多路选通
			ledsel     	: OUT	STD_LOGIC_VECTOR(5 DOWNTO 0));   --输出扫描信号
	END COMPONENT;

	COMPONENT ledmux
		PORT(
			datain		: IN    STD_LOGIC_VECTOR(29 DOWNTO 0);   --输入数据
			ledaddr		: IN    STD_LOGIC_VECTOR(2 DOWNTO 0);	 --地址
			dataout     : OUT	STD_LOGIC_VECTOR(4 DOWNTO 0));   --输出数据
	END COMPONENT;

	COMPONENT led_flicker
		PORT(
			ena				: IN	STD_LOGIC_VECTOR(5 DOWNTO 0);         --位使能
			flicker_ena		: IN	STD_LOGIC_VECTOR(5 DOWNTO 0);         --位闪烁使能
			addr			: IN	STD_LOGIC_VECTOR(2 DOWNTO 0);         --当前显示LED管地址
			din				: IN	STD_LOGIC_VECTOR(6 DOWNTO 0);         --数据输入（a,b,c,d,e,f,g）
			dp  			: IN	STD_LOGIC;                            --小数点输入
			clk_flicker		: IN	STD_LOGIC;							  --闪烁时钟
			dout			: OUT   STD_LOGIC_VECTOR(6 DOWNTO 0);         --输出数据(a,b,c,d,e,f,g）
			dpout			: OUT   STD_LOGIC );                          --小数点输出
	END COMPONENT;

	COMPONENT decoder7
		PORT(
			bcd	    : IN	STD_LOGIC_VECTOR(3 downto 0);   --二—进制输入
			dout	: OUT	STD_LOGIC_vector(6 downto 0));  --译码输出
	END COMPONENT;	

	COMPONENT disp_buf
		PORT(
		clk			: IN	STD_LOGIC;                       --全局时钟
		ld			: IN	STD_LOGIC;                       --同步加载使能
		data		: IN    STD_LOGIC_VECTOR(29 DOWNTO 0);   --并行加载数据
		addr		: IN    STD_LOGIC_VECTOR(2 DOWNTO 0);    --地址输入
		sdata       : IN    STD_LOGIC_VECTOR(4 DOWNTO 0);    --串行加载数据
		wr			: IN    STD_LOGIC;						 --写信号
		dataout     : OUT	STD_LOGIC_VECTOR(29 DOWNTO 0));  --输出数据
	END COMPONENT;	

	SIGNAL clk_scan,clk_flicker : STD_LOGIC;
	SIGNAL ledaddr				:STD_LOGIC_VECTOR(2 DOWNTO 0);
	SIGNAL ledsel     	        :STD_LOGIC_VECTOR(5 DOWNTO 0);
	SIGNAL buf_output			:STD_LOGIC_VECTOR(29 DOWNTO 0);
	SIGNAL mux_output			:STD_LOGIC_VECTOR(4 DOWNTO 0);
	SIGNAL decoder_output       :STD_LOGIC_VECTOR(6 DOWNTO 0); 
BEGIN
	--时钟产生模块
	clk_gen1: led_clk_gen 
		PORT MAP (clk => clk, 
				  clk_scan => clk_scan,
		          clk_flicker => clk_flicker);
    --扫描模块
	ledscan1: ledscan 
		PORT MAP (clk_scan => clk_scan, 
				  ledaddr => ledaddr,
		          ledsel => ledsel);
    --多路选通
	ledmux1: ledmux 
		PORT MAP (datain => buf_output, 
				  ledaddr => ledaddr,
		          dataout => mux_output);
    --闪烁模块
	ledflicker1: led_flicker 
		PORT MAP (ena => ena, 
				  flicker_ena => flicker_ena,
				  addr => ledaddr,
		          din => decoder_output,
				  dp => mux_output(4),
				  clk_flicker => clk_flicker,
				  dout => dout,
				  dpout => dp);
    --七段译码模块
	decoder71: decoder7
		PORT MAP (bcd => mux_output(3 DOWNTO 0), 
		          dout => decoder_output);
    --显示缓存
	disp_buf1: disp_buf
		PORT MAP (clk => clk, 
				  data => data,
				  ld	=> ld,
				  sdata => sdata,
				  addr => addr,
				  wr => wr,
		          dataout => buf_output);
END rtl;