📄 wdisplay3.vhd
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY wdisplay3 IS
PORT (
CLK : IN STD_LOGIC; -----控制了扫描的频率
ROW :OUT STD_LOGIC_VECTOR(7 DOWNTO 0); ----选择列中发光的二极管
COL :OUT STD_LOGIC_VECTOR(7 DOWNTO 0) ----选择发光的阵列
);
END wdisplay3;
ARCHITECTURE BEHV OF wdisplay3 IS
SIGNAL CNT : STD_LOGIC_VECTOR(2 DOWNTO 0);
BEGIN
PROCESS(CLK)
BEGIN
IF RISING_EDGE(CLK) THEN
CNT<=CNT+1;
END IF;
END PROCESS;
COL<= "10000000" WHEN CNT="000" ELSE
"01000000" WHEN CNT="001" ELSE
"00100000" WHEN CNT="010" ELSE
"00010000" WHEN CNT="011" ELSE
"00001000" WHEN CNT="100" ELSE
"00000100" WHEN CNT="101" ELSE
"00000010" WHEN CNT="110" ELSE
"00000001" ;
ROW<= "11111100" WHEN CNT="000" ELSE
"10000010" WHEN CNT="001" ELSE
"10000010" WHEN CNT="010" ELSE
"10000010" WHEN CNT="011" ELSE
"10000010" WHEN CNT="100" ELSE
"10000010" WHEN CNT="101" ELSE
"10000010" WHEN CNT="110" ELSE
"11111100" ;
END BEHV;
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