📄 pingpang.gfl

📁 实现乒乓缓存
💻 GFL
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# XST (Creating Lso File) : 
front.lso
# Check Syntax
front.stx
# XST (Creating Lso File) : 
front.lso
# Check Syntax
front.stx
# XST (Creating Lso File) : 
front.lso
# Check Syntax
front.stx
# XST (Creating Lso File) : 
front.lso
# Check Syntax
front.stx
# xst flow : RunXST
front_summary.html
# xst flow : RunXST
front.syr
front.prj
front.sprj
front.ana
front.stx
front.cmd_log
front.ngc
front.ngr
# View RTL Schematic
front.ngr
front.ngc
# XST (Creating Lso File) : 
clk_contrl.lso
# xst flow : RunXST
clk_contrl_summary.html
# xst flow : RunXST
clk_contrl.syr
clk_contrl.prj
clk_contrl.sprj
clk_contrl.ana
clk_contrl.stx
clk_contrl.cmd_log
clk_contrl.ngc
clk_contrl.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
clk_contrl.ngr
front.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
clk_contrl.ngr
front.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
clk_contrl.ngr
front.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
clk_contrl.ngr
front.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
clk_contrl.ngr
front.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
clk_contrl.ngr
front.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
pingpang.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
pingpang.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
pingpang.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
pingpang.ngr
# XST (Creating Lso File) : 
b_task.lso
# xst flow : RunXST
b_task_summary.html
# xst flow : RunXST
b_task.syr
b_task.prj
b_task.sprj
b_task.ana
b_task.stx
b_task.cmd_log
# XST (Creating Lso File) : 
b_task.lso
# xst flow : RunXST
b_task_summary.html
# xst flow : RunXST
b_task.syr
b_task.prj
b_task.sprj
b_task.ana
b_task.stx
b_task.cmd_log
b_task.ngc
b_task.ngr
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# Bencher : Creating project file
test_bencher.prj
# ProjNav -> New Source -> TBW
test.vhw
test.ano
test.tfw
test.ant
# Bencher : Creating project file
test_bencher.prj
# Bencher Waveform : PDCL (jhdparse)
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# Bencher : Creating project file
test_bencher.prj
# Bencher Waveform : PDCL (jhdparse)
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# Bencher : Creating project file
test_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
test.vhw
test.ano
test.tfw
test.ant
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# Bencher : Creating project file
test_bencher.prj
# Bencher Waveform : PDCL (jhdparse)
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# Bencher : Creating project file
test_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
test.vhw
test.ano
test.tfw
test.ant
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# Bencher : Creating project file
test_bencher.prj
# Bencher Waveform : PDCL (jhdparse)
# xst flow : RunXST
pingpang_summary.html
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# XST (Creating Lso File) : 
back.lso
# xst flow : RunXST
back_summary.html
# xst flow : RunXST
back.syr
back.prj
back.sprj
back.ana
back.stx
back.cmd_log
back.ngc
back.ngr
# Bencher : Creating project file
test_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
test.vhw
test.ano
test.tfw
test.ant
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# Bencher : Creating project file
test_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
test.vhw
test.ano
test.tfw
test.ant
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
b_task.lso
# xst flow : RunXST
b_task_summary.html
# xst flow : RunXST
b_task.syr
b_task.prj
b_task.sprj
b_task.ana
b_task.stx
b_task.cmd_log
b_task.ngc
b_task.ngr
# XST (Creating Lso File) : 
b_task.lso
# xst flow : RunXST
b_task_summary.html
# xst flow : RunXST
b_task.syr
b_task.prj
b_task.sprj
b_task.ana
b_task.stx
b_task.cmd_log
b_task.ngc
b_task.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# Bencher : Creating project file
test_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
test.vhw
test.ano
test.tfw
test.ant
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# Bencher : Creating project file
test_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
test.vhw
test.ano
test.tfw
test.ant
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# Bencher : Creating project file
test_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
test.vhw
test.ano
test.tfw
test.ant
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# Bencher : Creating project file
test_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
test.vhw
test.ano
test.tfw
test.ant
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
pingpang.lso
# xst flow : RunXST
pingpang_summary.html
# xst flow : RunXST
pingpang.syr
pingpang.prj
pingpang.sprj
pingpang.ana
pingpang.stx
pingpang.cmd_log
clk_contrl.ngc
front.ngc
b_task.ngc
back.ngc
pingpang.ngc
clk_contrl.ngr
front.ngr
b_task.ngr
back.ngr
pingpang.ngr
# Bencher : Creating project file
test_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
test.vhw
test.ano
test.tfw
test.ant
# ModelSim : Simulate Behavioral Verilog Model
test.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
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