📄 c8255.pin
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-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
----------------------------------------------------------------------------
CHIP "c8255" ASSIGNED TO AN EPM7096LC84-7
a0 : 1
~PIN009 : 2
VCCINT : 3
Pcl0 : 4
Pch2 : 5
N.C. : 6
GND : 7
Pa4 : 8
reset : 9
rd : 10
cs : 11
a1 : 12
VCCIO : 13
RESERVED : 14
d7 : 15
d6 : 16
Pch3 : 17
Pa1 : 18
GND : 19
Pa0 : 20
Pcl3 : 21
Pb4 : 22
Pb2 : 23
Pa5 : 24
Pb0 : 25
VCCIO : 26
d4 : 27
d3 : 28
Pa3 : 29
Pa_latch6 : 30
Pcl2 : 31
GND : 32
Pa2 : 33
Pa6 : 34
d5 : 35
Pa_latch2 : 36
Pa_latch5 : 37
VCCIO : 38
N.C. : 39
Pb5 : 40
d2 : 41
GND : 42
VCCINT : 43
Pc_latch5 : 44
Pb6 : 45
N.C. : 46
GND : 47
Pb7 : 48
Pc_latch4 : 49
Pa_latch3 : 50
Pa_latch7 : 51
Pa7 : 52
VCCIO : 53
Pcl1 : 54
Pc_latch7 : 55
Pc_latch6 : 56
d1 : 57
Pb1 : 58
GND : 59
Pch0 : 60
~PIN002 : 61
Pa_latch1 : 62
Pa_latch4 : 63
Pch1 : 64
~PIN010 : 65
VCCIO : 66
RESERVED : 67
RESERVED : 68
Pb3 : 69
d0 : 70
Pc_latch0 : 71
GND : 72
~PIN004 : 73
Pc_latch1 : 74
~PIN006 : 75
~PIN008 : 76
Pc_latch3 : 77
VCCIO : 78
N.C. : 79
Pa_latch0 : 80
Pc_latch2 : 81
GND : 82
wr : 83
~PIN003 : 84
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