dds.sim.rpt

基于飓风1 fpga 和stc单片机的dds信号源 程序是自己些的 能用 最大频率是2M

; |dds|receive_f:inst4|qtemp[16]                                                                              ; |dds|receive_f:inst4|qtemp[16]                                                                                       ; regout           ;
; |dds|receive_f:inst4|qtemp[17]                                                                              ; |dds|receive_f:inst4|qtemp[17]                                                                                       ; regout           ;
; |dds|receive_f:inst4|qtemp[18]                                                                              ; |dds|receive_f:inst4|qtemp[18]                                                                                       ; regout           ;
; |dds|receive_f:inst4|qtemp[19]                                                                              ; |dds|receive_f:inst4|qtemp[19]                                                                                       ; regout           ;
; |dds|receive_f:inst4|qtemp[9]                                                                               ; |dds|receive_f:inst4|qtemp[9]                                                                                        ; regout           ;
; |dds|receive_f:inst4|qout[8]                                                                                ; |dds|receive_f:inst4|qout[8]                                                                                         ; regout           ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[7]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[7]~47           ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[7]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[7]~47COUT1_62   ; cout1            ;
; |dds|receive_f:inst4|qtemp[8]                                                                               ; |dds|receive_f:inst4|qtemp[8]                                                                                        ; regout           ;
; |dds|receive_f:inst4|qout[7]                                                                                ; |dds|receive_f:inst4|qout[7]                                                                                         ; regout           ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[6]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[6]~48           ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[6]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[6]~48COUT1_61   ; cout1            ;
; |dds|receive_f:inst4|qtemp[7]                                                                               ; |dds|receive_f:inst4|qtemp[7]                                                                                        ; regout           ;
; |dds|receive_f:inst4|qout[6]                                                                                ; |dds|receive_f:inst4|qout[6]                                                                                         ; regout           ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5]~49           ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5]~49COUT1_60   ; cout1            ;
; |dds|receive_f:inst4|qtemp[6]                                                                               ; |dds|receive_f:inst4|qtemp[6]                                                                                        ; regout           ;
; |dds|receive_f:inst4|qout[5]                                                                                ; |dds|receive_f:inst4|qout[5]                                                                                         ; regout           ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4]~50           ; cout             ;
; |dds|receive_f:inst4|qtemp[5]                                                                               ; |dds|receive_f:inst4|qtemp[5]                                                                                        ; regout           ;
; |dds|receive_f:inst4|qout[4]                                                                                ; |dds|receive_f:inst4|qout[4]                                                                                         ; regout           ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~51           ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~51COUT1_59   ; cout1            ;
; |dds|receive_f:inst4|qtemp[4]                                                                               ; |dds|receive_f:inst4|qtemp[4]                                                                                        ; regout           ;
; |dds|receive_f:inst4|qout[3]                                                                                ; |dds|receive_f:inst4|qout[3]                                                                                         ; regout           ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~52           ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~52COUT1_58   ; cout1            ;
; |dds|receive_f:inst4|qtemp[3]                                                                               ; |dds|receive_f:inst4|qtemp[3]                                                                                        ; regout           ;
; |dds|receive_f:inst4|qout[2]                                                                                ; |dds|receive_f:inst4|qout[2]                                                                                         ; regout           ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[1]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[1]~53           ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[1]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[1]~53COUT1_57   ; cout1            ;
; |dds|receive_f:inst4|qtemp[2]                                                                               ; |dds|receive_f:inst4|qtemp[2]                                                                                        ; regout           ;
; |dds|receive_f:inst4|qout[1]                                                                                ; |dds|receive_f:inst4|qout[1]                                                                                         ; regout           ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[0]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[0]~54           ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[0]     ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[0]~54COUT1_56   ; cout1            ;
; |dds|receive_f:inst4|qtemp[1]                                                                               ; |dds|receive_f:inst4|qtemp[1]                                                                                        ; regout           ;
; |dds|receive_f:inst4|qout[0]                                                                                ; |dds|receive_f:inst4|qout[0]                                                                                         ; regout           ;
; |dds|receive_f:inst4|qtemp[0]                                                                               ; |dds|receive_f:inst4|qtemp[0]                                                                                        ; regout           ;
; |dds|mcuenable                                                                                              ; |dds|mcuenable                                                                                                       ; combout          ;
; |dds|dacba                                                                                                  ; |dds|dacba                                                                                                           ; padio            ;
; |dds|cs                                                                                                     ; |dds|cs                                                                                                              ; padio            ;
; |dds|da[7]                                                                                                  ; |dds|da[7]                                                                                                           ; padio            ;
+-------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                                                                                                                                                                                              ;
+-------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                   ; Output Port Name                                                                                                     ; Output Port Type ;
+-------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------+------------------+
; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[7]                    ; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[7]                             ; portadataout0    ;
; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[7]                    ; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[5]                             ; portadataout1    ;
; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[7]                    ; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[4]                             ; portadataout2    ;
; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[7]                    ; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[1]                             ; portadataout3    ;
; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[6]                    ; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[6]                             ; portadataout0    ;
; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[6]                    ; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[3]                             ; portadataout1    ;
; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[6]                    ; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[2]                             ; portadataout2    ;
; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[6]                    ; |dds|sine_rom:inst|altsyncram:altsyncram_component|altsyncram_lu21:auto_generated|q_a[0]                             ; portadataout3    ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~187 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~187          ; combout          ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~187 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~188          ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~187 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~188COUT1_208 ; cout1            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~189 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~189          ; combout          ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~189 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~190          ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~189 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~190COUT1_209 ; cout1            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~191 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~191          ; combout          ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~191 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~192          ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~191 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~192COUT1_210 ; cout1            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~193 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~193          ; combout          ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~193 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~194          ; cout0            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~193 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~194COUT1_211 ; cout1            ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~195 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~195          ; combout          ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~195 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~196          ; cout             ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~197 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~197          ; combout          ;
; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~197 ; |dds|add:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~198          ; cout0            ;