📄 ps2rs232.map.rpt
字号:
Warning (10230): Verilog HDL assignment warning at ps2_keyboard_interface.v(436): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at ps2_keyboard_interface.v(454): truncated value with size 32 to match size of target (4)
Warning (10230): Verilog HDL assignment warning at ps2_keyboard_interface.v(483): truncated value with size 32 to match size of target (12)
Warning (10230): Verilog HDL assignment warning at ps2_keyboard_interface.v(491): truncated value with size 32 to match size of target (8)
Info: Elaborating entity "div_256" for hierarchy "div_256:inst4"
Warning (10230): Verilog HDL assignment warning at div_256.v(16): truncated value with size 32 to match size of target (7)
Info: Elaborating entity "uart_if" for hierarchy "uart_if:inst3"
Warning (10230): Verilog HDL assignment warning at uart_if.v(51): truncated value with size 32 to match size of target (4)
Warning (10230): Verilog HDL assignment warning at uart_if.v(85): truncated value with size 32 to match size of target (8)
Warning (10230): Verilog HDL assignment warning at uart_if.v(130): truncated value with size 32 to match size of target (1)
Info: Elaborating entity "uart" for hierarchy "uart_if:inst3|uart:U1"
Info: Elaborating entity "rcvr" for hierarchy "uart_if:inst3|uart:U1|rcvr:u1"
Warning (10230): Verilog HDL assignment warning at rcvr.v(92): truncated value with size 32 to match size of target (4)
Warning (10230): Verilog HDL assignment warning at rcvr.v(134): truncated value with size 32 to match size of target (4)
Info: Elaborating entity "txmit" for hierarchy "uart_if:inst3|uart:U1|txmit:u2"
Warning (10230): Verilog HDL assignment warning at txmit.v(86): truncated value with size 32 to match size of target (4)
Warning (10230): Verilog HDL assignment warning at txmit.v(147): truncated value with size 32 to match size of target (4)
Info: Elaborating entity "div_4" for hierarchy "div_4:inst"
Warning (10230): Verilog HDL assignment warning at div_4.v(8): truncated value with size 32 to match size of target (13)
Info: Elaborating entity "data_buf" for hierarchy "data_buf:inst5"
Warning (10230): Verilog HDL assignment warning at data_buf.v(19): truncated value with size 32 to match size of target (4)
Warning: Converted TRI buffer or tri-state bus to logic, or removed OPNDRN
Warning: Converting TRI node "data_buf:inst5|data_in_buf[7]" that feeds logic to a wire
Warning: Converting TRI node "data_buf:inst5|data_in_buf[6]" that feeds logic to a wire
Warning: Converting TRI node "data_buf:inst5|data_in_buf[5]" that feeds logic to a wire
Warning: Converting TRI node "data_buf:inst5|data_in_buf[4]" that feeds logic to a wire
Warning: Converting TRI node "data_buf:inst5|data_in_buf[3]" that feeds logic to a wire
Warning: Converting TRI node "data_buf:inst5|data_in_buf[2]" that feeds logic to a wire
Warning: Converting TRI node "data_buf:inst5|data_in_buf[1]" that feeds logic to a wire
Warning: Converting TRI node "data_buf:inst5|data_in_buf[0]" that feeds logic to a wire
Warning: Converting TRI node "uart_if:inst3|uart:U1|rcvr:u1|dout[7]" that feeds logic to a wire
Warning: Converting TRI node "uart_if:inst3|uart:U1|rcvr:u1|dout[6]" that feeds logic to a wire
Warning: Converting TRI node "uart_if:inst3|uart:U1|rcvr:u1|dout[5]" that feeds logic to a wire
Warning: Converting TRI node "uart_if:inst3|uart:U1|rcvr:u1|dout[4]" that feeds logic to a wire
Warning: Converting TRI node "uart_if:inst3|uart:U1|rcvr:u1|dout[3]" that feeds logic to a wire
Warning: Converting TRI node "uart_if:inst3|uart:U1|rcvr:u1|dout[2]" that feeds logic to a wire
Warning: Converting TRI node "uart_if:inst3|uart:U1|rcvr:u1|dout[1]" that feeds logic to a wire
Warning: Converting TRI node "uart_if:inst3|uart:U1|rcvr:u1|dout[0]" that feeds logic to a wire
Warning: Reduced register "ps2_keyboard_interface:inst1|rx_ascii[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "data_buf:inst5|data_in_buf[7]~reg0" with stuck data_in port to stuck value GND
Warning: Reduced register "uart_if:inst3|din[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "uart_if:inst3|uart:U1|txmit:u2|tbr[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "uart_if:inst3|uart:U1|txmit:u2|tsr[7]" with stuck data_in port to stuck value GND
Info: State machine "|ps2rs232|ps2_keyboard_interface:inst1|m1_state" contains 15 states
Info: Selected Auto state machine encoding method for state machine "|ps2rs232|ps2_keyboard_interface:inst1|m1_state"
Info: Encoding result for state machine "|ps2rs232|ps2_keyboard_interface:inst1|m1_state"
Info: Completed encoding using 15 state bits
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_error_no_keyboard_ack"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_rx_falling_edge_marker"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_rx_rising_edge_marker"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_rx_clk_l"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_reset_timer"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_force_clk_l"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_first_wait_clk_h"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_first_wait_clk_l"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_wait_clk_h"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_rising_edge_marker"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_clk_h"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_clk_l"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_wait_keyboard_ack"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_tx_done_recovery"
Info: Encoded state bit "ps2_keyboard_interface:inst1|m1_state.m1_rx_clk_h"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_rx_clk_h" uses code string "000000000000000"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_done_recovery" uses code string "000000000000011"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_wait_keyboard_ack" uses code string "000000000000101"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_clk_l" uses code string "000000000001001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_clk_h" uses code string "000000000010001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_rising_edge_marker" uses code string "000000000100001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_wait_clk_h" uses code string "000000001000001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_first_wait_clk_l" uses code string "000000010000001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_first_wait_clk_h" uses code string "000000100000001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_force_clk_l" uses code string "000001000000001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_reset_timer" uses code string "000010000000001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_rx_clk_l" uses code string "000100000000001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_rx_rising_edge_marker" uses code string "001000000000001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_rx_falling_edge_marker" uses code string "010000000000001"
Info: State "|ps2rs232|ps2_keyboard_interface:inst1|m1_state.m1_tx_error_no_keyboard_ack" uses code string "100000000000001"
Warning: Reduced register "ps2_keyboard_interface:inst1|m1_state.m1_tx_force_clk_l" with stuck data_in port to stuck value GND
Warning: Reduced register "ps2_keyboard_interface:inst1|m1_state.m1_tx_first_wait_clk_h" with stuck data_in port to stuck value GND
Warning: Reduced register "ps2_keyboard_interface:inst1|m1_state.m1_tx_first_wait_clk_l" with stuck data_in port to stuck value GND
Info: Registers with preset signals will power-up high
Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Info: Converted presettable and clearable register to equivalent circuits with latches. Registers will power-up to an undefined state, and DEVCLRn will place the registers in an undefined state.
Info: Register "data_buf:inst5|data_in_buf[0]~reg0" converted into equivalent circuit using register "data_buf:inst5|data_in_buf[0]~reg0$emulated" and latch "data_buf:inst5|data_in_buf[0]~349"
Info: Register "data_buf:inst5|data_in_buf[1]~reg0" converted into equivalent circuit using register "data_buf:inst5|data_in_buf[1]~reg0$emulated" and latch "data_buf:inst5|data_in_buf[1]~360"
Info: Register "data_buf:inst5|data_in_buf[2]~reg0" converted into equivalent circuit using register "data_buf:inst5|data_in_buf[2]~reg0$emulated" and latch "data_buf:inst5|data_in_buf[2]~371"
Info: Register "data_buf:inst5|data_in_buf[3]~reg0" converted into equivalent circuit using register "data_buf:inst5|data_in_buf[3]~reg0$emulated" and latch "data_buf:inst5|data_in_buf[3]~382"
Info: Register "data_buf:inst5|data_in_buf[4]~reg0" converted into equivalent circuit using register "data_buf:inst5|data_in_buf[4]~reg0$emulated" and latch "data_buf:inst5|data_in_buf[4]~393"
Info: Register "data_buf:inst5|data_in_buf[5]~reg0" converted into equivalent circuit using register "data_buf:inst5|data_in_buf[5]~reg0$emulated" and latch "data_buf:inst5|data_in_buf[5]~404"
Info: Register "data_buf:inst5|data_in_buf[6]~reg0" converted into equivalent circuit using register "data_buf:inst5|data_in_buf[6]~reg0$emulated" and latch "data_buf:inst5|data_in_buf[6]~415"
Warning: Output pins are stuck at VCC or GND
Warning: Pin "tx_write_ack_o" stuck at GND
Warning: Pin "rx_ascii[7]" stuck at GND
Warning: Design contains 1 input pin(s) that do not drive logic
Warning: No output dependent on input pin "rx_read"
Info: Implemented 444 device resources after synthesis - the final resource count might be different
Info: Implemented 3 input pins
Info: Implemented 10 output pins
Info: Implemented 2 bidirectional pins
Info: Implemented 429 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 52 warnings
Info: Processing ended: Mon Oct 08 15:10:34 2007
Info: Elapsed time: 00:00:16
+------------------------------------------+
; Analysis & Synthesis Suppressed Messages ;
+------------------------------------------+
The suppressed messages can be found in E:/FPGA/xinkaifabanshiyan/zijizuode/ps2rs232/ps2rs232.map.smsg.
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -