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📄 pskfsk.fit.eqn

📁 FSK和PSK调制与解调的VHDL源程序.是在QUARTUS2环境下开发的.
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L34Q is CLK240~reg0 at LC_X11_Y6_N2
--operation mode is normal

A1L34Q_lut_out = A1L34Q $ (COUNT[2] & COUNT[0] & !A1L24 # !COUNT[2] & !COUNT[0] & A1L24);
A1L34Q = DFFEAS(A1L34Q_lut_out, GLOBAL(CLOCK), VCC, , , , , , );


--A1L04Q is CLK120~reg0 at LC_X11_Y6_N4
--operation mode is normal

A1L04Q_lut_out = !A1L04Q;
A1L04Q = DFFEAS(A1L04Q_lut_out, A1L34Q, VCC, , , , , , );


--C1_q_a[0] is altsyncram:Mux_rtl_0|altsyncram_36j:auto_generated|q_a[0] at M4K_X13_Y4
--RAM Block Operation Mode: ROM
--Port A Depth: 128, Port A Width: 8
--Port A Logical Depth: 128, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
C1_q_a[0]_PORT_A_address = BUS(A1L36, A1L46, A1L56, A1L66, A1L76, A1L86, A1L96);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L58);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[0] = C1_q_a[0]_PORT_A_data_out[0];

--C1_q_a[7] is altsyncram:Mux_rtl_0|altsyncram_36j:auto_generated|q_a[7] at M4K_X13_Y4
C1_q_a[0]_PORT_A_address = BUS(A1L36, A1L46, A1L56, A1L66, A1L76, A1L86, A1L96);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L58);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[7] = C1_q_a[0]_PORT_A_data_out[7];

--C1_q_a[6] is altsyncram:Mux_rtl_0|altsyncram_36j:auto_generated|q_a[6] at M4K_X13_Y4
C1_q_a[0]_PORT_A_address = BUS(A1L36, A1L46, A1L56, A1L66, A1L76, A1L86, A1L96);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L58);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[6] = C1_q_a[0]_PORT_A_data_out[6];

--C1_q_a[5] is altsyncram:Mux_rtl_0|altsyncram_36j:auto_generated|q_a[5] at M4K_X13_Y4
C1_q_a[0]_PORT_A_address = BUS(A1L36, A1L46, A1L56, A1L66, A1L76, A1L86, A1L96);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L58);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[5] = C1_q_a[0]_PORT_A_data_out[5];

--C1_q_a[4] is altsyncram:Mux_rtl_0|altsyncram_36j:auto_generated|q_a[4] at M4K_X13_Y4
C1_q_a[0]_PORT_A_address = BUS(A1L36, A1L46, A1L56, A1L66, A1L76, A1L86, A1L96);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L58);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[4] = C1_q_a[0]_PORT_A_data_out[4];

--C1_q_a[3] is altsyncram:Mux_rtl_0|altsyncram_36j:auto_generated|q_a[3] at M4K_X13_Y4
C1_q_a[0]_PORT_A_address = BUS(A1L36, A1L46, A1L56, A1L66, A1L76, A1L86, A1L96);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L58);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[3] = C1_q_a[0]_PORT_A_data_out[3];

--C1_q_a[2] is altsyncram:Mux_rtl_0|altsyncram_36j:auto_generated|q_a[2] at M4K_X13_Y4
C1_q_a[0]_PORT_A_address = BUS(A1L36, A1L46, A1L56, A1L66, A1L76, A1L86, A1L96);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L58);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[2] = C1_q_a[0]_PORT_A_data_out[2];

--C1_q_a[1] is altsyncram:Mux_rtl_0|altsyncram_36j:auto_generated|q_a[1] at M4K_X13_Y4
C1_q_a[0]_PORT_A_address = BUS(A1L36, A1L46, A1L56, A1L66, A1L76, A1L86, A1L96);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L58);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[1] = C1_q_a[0]_PORT_A_data_out[1];


--COUNT[2] is COUNT[2] at LC_X15_Y6_N5
--operation mode is normal

COUNT[2]_lut_out = !COUNT[2];
COUNT[2] = DFFEAS(COUNT[2]_lut_out, GLOBAL(CLOCK), VCC, , A1L12, , , , );


--COUNT[0] is COUNT[0] at LC_X15_Y6_N2
--operation mode is normal

COUNT[0]_lut_out = !COUNT[0];
COUNT[0] = DFFEAS(COUNT[0]_lut_out, GLOBAL(CLOCK), VCC, , , , , , );


--COUNT[1] is COUNT[1] at LC_X15_Y6_N6
--operation mode is normal

COUNT[1]_lut_out = COUNT[0] & (!COUNT[1]) # !COUNT[0] & COUNT[1] & (COUNT[2] # !COUNT[3]);
COUNT[1] = DFFEAS(COUNT[1]_lut_out, GLOBAL(CLOCK), VCC, , , , , , );


--COUNT[3] is COUNT[3] at LC_X15_Y6_N8
--operation mode is normal

COUNT[3]_lut_out = COUNT[0] & (COUNT[3] $ (COUNT[2] & COUNT[1])) # !COUNT[0] & COUNT[3] & (COUNT[2] # !COUNT[1]);
COUNT[3] = DFFEAS(COUNT[3]_lut_out, GLOBAL(CLOCK), VCC, , , , , , );


--A1L24 is CLK240~246 at LC_X15_Y6_N9
--operation mode is normal

A1L24 = COUNT[3] & (COUNT[0] # COUNT[1]) # !COUNT[3] & COUNT[0] & COUNT[1];


--A1L58 is SINCLK~68 at LC_X8_Y6_N5
--operation mode is normal

A1L58 = M[0] & (A1L34Q) # !M[0] & (MODE & A1L34Q # !MODE & (A1L04Q));


--A1L1 is add~307 at LC_X16_Y4_N1
--operation mode is arithmetic

A1L1 = !COUNT100[0];

--A1L2 is add~309 at LC_X16_Y4_N1
--operation mode is arithmetic

A1L2_cout_0 = COUNT100[0];
A1L2 = CARRY(A1L2_cout_0);

--A1L3 is add~309COUT1_382 at LC_X16_Y4_N1
--operation mode is arithmetic

A1L3_cout_1 = COUNT100[0];
A1L3 = CARRY(A1L3_cout_1);


--A1L08 is process5~30 at LC_X16_Y4_N0
--operation mode is normal

M[0]_qfbk = M[0];
A1L08 = M[0]_qfbk # !TEMP # !MODE;

--M[0] is M[0] at LC_X16_Y4_N0
--operation mode is normal

M[0] = DFFEAS(A1L08, GLOBAL(CODERATE), VCC, , , M[1], , , VCC);


--A1L28 is reduce_nor~99 at LC_X15_Y4_N0
--operation mode is normal

A1L28 = COUNT100[4] # COUNT100[3] # !COUNT100[5] # !COUNT100[6];


--A1L38 is reduce_nor~100 at LC_X15_Y4_N3
--operation mode is normal

A1L38 = COUNT100[2] # !COUNT100[0] # !COUNT100[1];


--A1L26 is COUNT100~220 at LC_X15_Y4_N1
--operation mode is normal

TEMP_qfbk = TEMP;
A1L26 = M[0] & TEMP_qfbk & (A1L38 # A1L28) # !M[0] & (A1L38 # A1L28);

--TEMP is TEMP at LC_X15_Y4_N1
--operation mode is normal

TEMP = DFFEAS(A1L26, GLOBAL(A1L58), VCC, , , M[0], , , VCC);


--A1L36 is COUNT100~221 at LC_X15_Y4_N2
--operation mode is normal

A1L36 = A1L1 & A1L08 & (A1L26);

--COUNT100[0] is COUNT100[0] at LC_X15_Y4_N2
--operation mode is normal

COUNT100[0] = DFFEAS(A1L36, GLOBAL(A1L58), VCC, , , , , , );


--A1L4 is add~312 at LC_X16_Y4_N2
--operation mode is arithmetic

A1L4 = COUNT100[1] $ A1L2;

--A1L5 is add~314 at LC_X16_Y4_N2
--operation mode is arithmetic

A1L5_cout_0 = !A1L2 # !COUNT100[1];
A1L5 = CARRY(A1L5_cout_0);

--A1L6 is add~314COUT1_384 at LC_X16_Y4_N2
--operation mode is arithmetic

A1L6_cout_1 = !A1L3 # !COUNT100[1];
A1L6 = CARRY(A1L6_cout_1);


--A1L46 is COUNT100~222 at LC_X15_Y4_N4
--operation mode is normal

A1L46 = A1L26 & (A1L4 # !A1L08);

--COUNT100[1] is COUNT100[1] at LC_X15_Y4_N4
--operation mode is normal

COUNT100[1] = DFFEAS(A1L46, GLOBAL(A1L58), VCC, , , , , , );


--A1L7 is add~317 at LC_X16_Y4_N3
--operation mode is arithmetic

A1L7 = COUNT100[2] $ !A1L5;

--A1L8 is add~319 at LC_X16_Y4_N3
--operation mode is arithmetic

A1L8_cout_0 = COUNT100[2] & !A1L5;
A1L8 = CARRY(A1L8_cout_0);

--A1L9 is add~319COUT1_385 at LC_X16_Y4_N3
--operation mode is arithmetic

A1L9_cout_1 = COUNT100[2] & !A1L6;
A1L9 = CARRY(A1L9_cout_1);


--A1L56 is COUNT100~223 at LC_X15_Y4_N5
--operation mode is normal

A1L56 = A1L7 & A1L08 & (A1L26);

--COUNT100[2] is COUNT100[2] at LC_X15_Y4_N5
--operation mode is normal

COUNT100[2] = DFFEAS(A1L56, GLOBAL(A1L58), VCC, , , , , , );


--A1L01 is add~322 at LC_X16_Y4_N4
--operation mode is arithmetic

A1L01 = COUNT100[3] $ A1L8;

--A1L11 is add~324 at LC_X16_Y4_N4
--operation mode is arithmetic

A1L11 = A1L21;


--A1L66 is COUNT100~224 at LC_X15_Y4_N7
--operation mode is normal

A1L66 = A1L01 & A1L08 & A1L26;

--COUNT100[3] is COUNT100[3] at LC_X15_Y4_N7
--operation mode is normal

COUNT100[3] = DFFEAS(A1L66, GLOBAL(A1L58), VCC, , , , , , );


--A1L41 is add~327 at LC_X16_Y4_N5
--operation mode is arithmetic

A1L41_carry_eqn = (!A1L11 & GND) # (A1L11 & VCC);
A1L41 = COUNT100[4] $ (!A1L41_carry_eqn);

--A1L51 is add~329 at LC_X16_Y4_N5
--operation mode is arithmetic

A1L51_cout_0 = COUNT100[4] & (!A1L11);
A1L51 = CARRY(A1L51_cout_0);

--A1L61 is add~329COUT1_387 at LC_X16_Y4_N5
--operation mode is arithmetic

A1L61_cout_1 = COUNT100[4] & (!A1L11);
A1L61 = CARRY(A1L61_cout_1);


--A1L76 is COUNT100~225 at LC_X15_Y4_N8
--operation mode is normal

A1L76 = A1L26 & (A1L41 # !A1L08);

--COUNT100[4] is COUNT100[4] at LC_X15_Y4_N8
--operation mode is normal

COUNT100[4] = DFFEAS(A1L76, GLOBAL(A1L58), VCC, , , , , , );

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