test.map.qmsg

基于QUARTUSII软件 实现FPGA（ATERA CYCLONE II系列）与SD卡SD模式通信 所用语言位verilog HDL

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Nov 07 11:02:53 2007 " "Info: Processing started: Wed Nov 07 11:02:53 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off test -c test " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off test -c test" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "test.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file test.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 test " "Info: Found entity 1: test" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "confirmpulse.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file confirmpulse.v" { { "Info" "ISGN_ENTITY_NAME" "1 confirmpulse " "Info: Found entity 1: confirmpulse" {  } { { "confirmpulse.v" "" { Text "C:/altera/quartus50/workone/confirmpulse.v" 14 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "get_response.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file get_response.v" { { "Info" "ISGN_ENTITY_NAME" "1 get_response " "Info: Found entity 1: get_response" {  } { { "get_response.v" "" { Text "C:/altera/quartus50/workone/get_response.v" 9 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "odd_division.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file odd_division.v" { { "Info" "ISGN_ENTITY_NAME" "1 odd_division " "Info: Found entity 1: odd_division" {  } { { "odd_division.v" "" { Text "C:/altera/quartus50/workone/odd_division.v" 12 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "sd_initial.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file sd_initial.v" { { "Info" "ISGN_ENTITY_NAME" "1 sd_initial " "Info: Found entity 1: sd_initial" {  } { { "sd_initial.v" "" { Text "C:/altera/quartus50/workone/sd_initial.v" 8 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "send_cmd.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file send_cmd.v" { { "Info" "ISGN_ENTITY_NAME" "1 send_cmd " "Info: Found entity 1: send_cmd" {  } { { "send_cmd.v" "" { Text "C:/altera/quartus50/workone/send_cmd.v" 10 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "shift_r1.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file shift_r1.v" { { "Info" "ISGN_ENTITY_NAME" "1 shift_r1 " "Info: Found entity 1: shift_r1" {  } { { "shift_r1.v" "" { Text "C:/altera/quartus50/workone/shift_r1.v" 13 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "shift_reg.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file shift_reg.v" { { "Info" "ISGN_ENTITY_NAME" "1 shift_reg " "Info: Found entity 1: shift_reg" {  } { { "shift_reg.v" "" { Text "C:/altera/quartus50/workone/shift_reg.v" 14 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "timer.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file timer.v" { { "Info" "ISGN_ENTITY_NAME" "1 timer " "Info: Found entity 1: timer" {  } { { "timer.v" "" { Text "C:/altera/quartus50/workone/timer.v" 12 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "bidirec.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file bidirec.v" { { "Info" "ISGN_ENTITY_NAME" "1 bidirec " "Info: Found entity 1: bidirec" {  } { { "bidirec.v" "" { Text "C:/altera/quartus50/workone/bidirec.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "wipe_off_burr.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file wipe_off_burr.v" { { "Info" "ISGN_ENTITY_NAME" "1 wipe_off_burr " "Info: Found entity 1: wipe_off_burr" {  } { { "wipe_off_burr.v" "" { Text "C:/altera/quartus50/workone/wipe_off_burr.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "initial_block.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file initial_block.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 initial_block " "Info: Found entity 1: initial_block" {  } { { "initial_block.bdf" "" { Schematic "C:/altera/quartus50/workone/initial_block.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "mux_2_1.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file mux_2_1.v" { { "Info" "ISGN_ENTITY_NAME" "1 mux_2_1 " "Info: Found entity 1: mux_2_1" {  } { { "mux_2_1.v" "" { Text "C:/altera/quartus50/workone/mux_2_1.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "sd_control.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file sd_control.v" { { "Info" "ISGN_ENTITY_NAME" "1 sd_control " "Info: Found entity 1: sd_control" {  } { { "sd_control.v" "" { Text "C:/altera/quartus50/workone/sd_control.v" 9 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "te.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file te.v" { { "Info" "ISGN_ENTITY_NAME" "1 te " "Info: Found entity 1: te" {  } { { "te.v" "" { Text "C:/altera/quartus50/workone/te.v" 2 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "tee.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file tee.v" { { "Info" "ISGN_ENTITY_NAME" "1 tee " "Info: Found entity 1: tee" {  } { { "tee.v" "" { Text "C:/altera/quartus50/workone/tee.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "test " "Info: Elaborating entity \"test\" for the top level hierarchy" {  } {  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PIN" "sd1_clk " "Warning: Pin \"sd1_clk\" is missing source" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { -56 416 592 -40 "sd1_clk" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PIN" "sd3_clk " "Warning: Pin \"sd3_clk\" is missing source" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 8 416 592 24 "sd3_clk" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PIN" "sd4_clk " "Warning: Pin \"sd4_clk\" is missing source" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 40 416 592 56 "sd4_clk" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PIN" "fifo2_rclk " "Warning: Pin \"fifo2_rclk\" is missing source" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 384 416 592 400 "fifo2_rclk" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PIN" "fifo34_wen " "Warning: Pin \"fifo34_wen\" is missing source" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 464 416 592 480 "fifo34_wen" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PIN" "fifo34_mrs " "Warning: Pin \"fifo34_mrs\" is missing source" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 528 416 592 544 "fifo34_mrs" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PIN" "fifo34_ren " "Warning: Pin \"fifo34_ren\" is missing source" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 656 416 592 672 "fifo34_ren" "" } } } }  } 0}
{ "Warning" "WGDFX_PIN_IGNORED" "fifo1_ef " "Warning: Pin \"fifo1_ef\" not connected" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 224 40 208 240 "fifo1_ef" "" } } } }  } 0}
{ "Warning" "WGDFX_PIN_IGNORED" "fifo3_ef " "Warning: Pin \"fifo3_ef\" not connected" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 288 40 208 304 "fifo3_ef" "" } } } }  } 0}
{ "Warning" "WGDFX_PIN_IGNORED" "fifo4_ef " "Warning: Pin \"fifo4_ef\" not connected" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 320 40 208 336 "fifo4_ef" "" } } } }  } 0}
{ "Warning" "WGDFX_PIN_IGNORED" "al_da_ram " "Warning: Pin \"al_da_ram\" not connected" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 728 -56 112 744 "al_da_ram" "" } { 720 112 184 736 "al_da_ram" "" } } } }  } 0}
{ "Warning" "WGDFX_PIN_IGNORED" "sd1_dat " "Warning: Pin \"sd1_dat\" not connected" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 88 40 208 104 "sd1_dat\[3..0\]" "" } } } }  } 0}
{ "Warning" "WGDFX_PIN_IGNORED" "sd3_dat " "Warning: Pin \"sd3_dat\" not connected" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 152 40 208 168 "sd3_dat\[3..0\]" "" } } } }  } 0}
{ "Warning" "WGDFX_PIN_IGNORED" "sd4_dat " "Warning: Pin \"sd4_dat\" not connected" {  } { { "test.bdf" "" { Schematic "C:/altera/quartus50/workone/test.bdf" { { 184 40 208 200 "sd4_dat\[3..0\]" "" } } } }  } 0}