counter10.map.eqn

VHDL编写的万年历,已在实验箱上验证,目标芯片EP1C3T144C8

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--count[0] is count[0]
--operation mode is normal

count[0]_lut_out = !count[0];
count[0] = DFFEAS(count[0]_lut_out, clk, VCC, , , din[0], !reset, , );


--count[1] is count[1]
--operation mode is normal

count[1]_lut_out = A1L8;
count[1] = DFFEAS(count[1]_lut_out, clk, VCC, , , din[1], !reset, , );


--count[2] is count[2]
--operation mode is normal

count[2]_lut_out = count[2] $ (count[0] & (count[1]));
count[2] = DFFEAS(count[2]_lut_out, clk, VCC, , , din[2], !reset, , );


--count[3] is count[3]
--operation mode is normal

count[3]_lut_out = A1L9;
count[3] = DFFEAS(count[3]_lut_out, clk, VCC, , , din[3], !reset, , );


--A1L10Q is c~reg0
--operation mode is normal

A1L10Q_lut_out = count[0] & count[3] & !count[1] & !count[2];
A1L10Q = DFFEAS(A1L10Q_lut_out, clk, reset, , , , , , );


--A1L8 is count~96
--operation mode is normal

A1L8 = count[1] & (!count[0]) # !count[1] & count[0] & (count[2] # !count[3]);


--A1L9 is count~98
--operation mode is normal

A1L9 = count[3] & (count[1] $ count[2] # !count[0]) # !count[3] & count[1] & count[2] & count[0];


--clk is clk
--operation mode is input

clk = INPUT();


--din[0] is din[0]
--operation mode is input

din[0] = INPUT();


--reset is reset
--operation mode is input

reset = INPUT();


--din[1] is din[1]
--operation mode is input

din[1] = INPUT();


--din[2] is din[2]
--operation mode is input

din[2] = INPUT();


--din[3] is din[3]
--operation mode is input

din[3] = INPUT();


--dout[0] is dout[0]
--operation mode is output

dout[0] = OUTPUT(count[0]);


--dout[1] is dout[1]
--operation mode is output

dout[1] = OUTPUT(count[1]);


--dout[2] is dout[2]
--operation mode is output

dout[2] = OUTPUT(count[2]);


--dout[3] is dout[3]
--operation mode is output

dout[3] = OUTPUT(count[3]);


--c is c
--operation mode is output

c = OUTPUT(A1L10Q);