wogodiv.map.eqn

VHDL编写的万年历,已在实验箱上验证,目标芯片EP1C3T144C8

-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
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-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--a is a
--operation mode is normal

a_lut_out = a $ A1L79;
a = DFFEAS(a_lut_out, CLK, VCC, , , , , , );


--q[24] is q[24]
--operation mode is normal

q[24]_lut_out = A1L2 & (!A1L79);
q[24] = DFFEAS(q[24]_lut_out, CLK, VCC, , , , , , );


--q[21] is q[21]
--operation mode is normal

q[21]_lut_out = A1L3 & (!A1L79);
q[21] = DFFEAS(q[21]_lut_out, CLK, VCC, , , , , , );


--q[23] is q[23]
--operation mode is normal

q[23]_lut_out = A1L5;
q[23] = DFFEAS(q[23]_lut_out, CLK, VCC, , , , , , );


--q[22] is q[22]
--operation mode is normal

q[22]_lut_out = A1L7;
q[22] = DFFEAS(q[22]_lut_out, CLK, VCC, , , , , , );


--A1L80 is rtl~206
--operation mode is normal

A1L80 = q[24] & q[21] & !q[23] & !q[22];


--q[20] is q[20]
--operation mode is normal

q[20]_lut_out = A1L9 & (!A1L79);
q[20] = DFFEAS(q[20]_lut_out, CLK, VCC, , , , , , );


--q[19] is q[19]
--operation mode is normal

q[19]_lut_out = A1L11;
q[19] = DFFEAS(q[19]_lut_out, CLK, VCC, , , , , , );


--q[18] is q[18]
--operation mode is normal

q[18]_lut_out = A1L13;
q[18] = DFFEAS(q[18]_lut_out, CLK, VCC, , , , , , );


--q[17] is q[17]
--operation mode is normal

q[17]_lut_out = A1L15;
q[17] = DFFEAS(q[17]_lut_out, CLK, VCC, , , , , , );


--A1L81 is rtl~207
--operation mode is normal

A1L81 = q[20] & !q[19] & !q[18] & !q[17];


--q[16] is q[16]
--operation mode is normal

q[16]_lut_out = A1L17 & (!A1L79);
q[16] = DFFEAS(q[16]_lut_out, CLK, VCC, , , , , , );


--q[13] is q[13]
--operation mode is normal

q[13]_lut_out = A1L19 & (!A1L79);
q[13] = DFFEAS(q[13]_lut_out, CLK, VCC, , , , , , );


--q[15] is q[15]
--operation mode is normal

q[15]_lut_out = A1L21;
q[15] = DFFEAS(q[15]_lut_out, CLK, VCC, , , , , , );


--q[14] is q[14]
--operation mode is normal

q[14]_lut_out = A1L23;
q[14] = DFFEAS(q[14]_lut_out, CLK, VCC, , , , , , );


--A1L82 is rtl~208
--operation mode is normal

A1L82 = q[16] & q[13] & !q[15] & !q[14];


--q[11] is q[11]
--operation mode is normal

q[11]_lut_out = A1L25 & (!A1L79);
q[11] = DFFEAS(q[11]_lut_out, CLK, VCC, , , , , , );


--q[10] is q[10]
--operation mode is normal

q[10]_lut_out = A1L27 & (!A1L79);
q[10] = DFFEAS(q[10]_lut_out, CLK, VCC, , , , , , );


--q[12] is q[12]
--operation mode is normal

q[12]_lut_out = A1L29;
q[12] = DFFEAS(q[12]_lut_out, CLK, VCC, , , , , , );


--q[9] is q[9]
--operation mode is normal

q[9]_lut_out = A1L31;
q[9] = DFFEAS(q[9]_lut_out, CLK, VCC, , , , , , );


--A1L83 is rtl~209
--operation mode is normal

A1L83 = q[11] & q[10] & !q[12] & !q[9];


--A1L84 is rtl~210
--operation mode is normal

A1L84 = A1L80 & A1L81 & A1L82 & A1L83;


--q[7] is q[7]
--operation mode is normal

q[7]_lut_out = A1L33;
q[7] = DFFEAS(q[7]_lut_out, CLK, VCC, , , , , , );


--q[6] is q[6]
--operation mode is normal

q[6]_lut_out = A1L35;
q[6] = DFFEAS(q[6]_lut_out, CLK, VCC, , , , , , );


--q[5] is q[5]
--operation mode is normal

q[5]_lut_out = A1L37;
q[5] = DFFEAS(q[5]_lut_out, CLK, VCC, , , , , , );


--q[8] is q[8]
--operation mode is normal

q[8]_lut_out = A1L39 & (!A1L79);
q[8] = DFFEAS(q[8]_lut_out, CLK, VCC, , , , , , );


--A1L85 is rtl~211
--operation mode is normal

A1L85 = q[7] & q[6] & q[5] & !q[8];


--q[0] is q[0]
--operation mode is normal

q[0]_lut_out = A1L41;
q[0] = DFFEAS(q[0]_lut_out, CLK, VCC, , , , , , );


--q[4] is q[4]
--operation mode is normal

q[4]_lut_out = A1L43;
q[4] = DFFEAS(q[4]_lut_out, CLK, VCC, , , , , , );


--q[3] is q[3]
--operation mode is normal

q[3]_lut_out = A1L45;
q[3] = DFFEAS(q[3]_lut_out, CLK, VCC, , , , , , );


--q[2] is q[2]
--operation mode is normal

q[2]_lut_out = A1L47;
q[2] = DFFEAS(q[2]_lut_out, CLK, VCC, , , , , , );


--q[1] is q[1]
--operation mode is normal

q[1]_lut_out = A1L49;
q[1] = DFFEAS(q[1]_lut_out, CLK, VCC, , , , , , );


--A1L86 is rtl~212
--operation mode is normal

A1L86 = q[4] & q[3] & q[2] & q[1];


--A1L79 is rtl~0
--operation mode is normal

A1L79 = A1L84 & A1L85 & q[0] & A1L86;


--A1L2 is add~376
--operation mode is normal

A1L2_carry_eqn = A1L6;
A1L2 = q[24] $ (!A1L2_carry_eqn);


--A1L3 is add~381
--operation mode is arithmetic

A1L3_carry_eqn = A1L10;
A1L3 = q[21] $ (A1L3_carry_eqn);

--A1L4 is add~383
--operation mode is arithmetic

A1L4 = CARRY(!A1L10 # !q[21]);


--A1L5 is add~386
--operation mode is arithmetic

A1L5_carry_eqn = A1L8;
A1L5 = q[23] $ (A1L5_carry_eqn);

--A1L6 is add~388
--operation mode is arithmetic

A1L6 = CARRY(!A1L8 # !q[23]);


--A1L7 is add~391
--operation mode is arithmetic

A1L7_carry_eqn = A1L4;
A1L7 = q[22] $ (!A1L7_carry_eqn);

--A1L8 is add~393
--operation mode is arithmetic

A1L8 = CARRY(q[22] & (!A1L4));


--A1L9 is add~396
--operation mode is arithmetic

A1L9_carry_eqn = A1L12;
A1L9 = q[20] $ (!A1L9_carry_eqn);

--A1L10 is add~398
--operation mode is arithmetic

A1L10 = CARRY(q[20] & (!A1L12));


--A1L11 is add~401
--operation mode is arithmetic

A1L11_carry_eqn = A1L14;
A1L11 = q[19] $ (A1L11_carry_eqn);

--A1L12 is add~403
--operation mode is arithmetic

A1L12 = CARRY(!A1L14 # !q[19]);


--A1L13 is add~406
--operation mode is arithmetic

A1L13_carry_eqn = A1L16;
A1L13 = q[18] $ (!A1L13_carry_eqn);

--A1L14 is add~408
--operation mode is arithmetic

A1L14 = CARRY(q[18] & (!A1L16));


--A1L15 is add~411
--operation mode is arithmetic

A1L15_carry_eqn = A1L18;
A1L15 = q[17] $ (A1L15_carry_eqn);

--A1L16 is add~413
--operation mode is arithmetic

A1L16 = CARRY(!A1L18 # !q[17]);


--A1L17 is add~416
--operation mode is arithmetic

A1L17_carry_eqn = A1L22;
A1L17 = q[16] $ (!A1L17_carry_eqn);

--A1L18 is add~418
--operation mode is arithmetic

A1L18 = CARRY(q[16] & (!A1L22));


--A1L19 is add~421
--operation mode is arithmetic

A1L19_carry_eqn = A1L30;
A1L19 = q[13] $ (A1L19_carry_eqn);

--A1L20 is add~423
--operation mode is arithmetic

A1L20 = CARRY(!A1L30 # !q[13]);


--A1L21 is add~426
--operation mode is arithmetic

A1L21_carry_eqn = A1L24;
A1L21 = q[15] $ (A1L21_carry_eqn);

--A1L22 is add~428
--operation mode is arithmetic

A1L22 = CARRY(!A1L24 # !q[15]);


--A1L23 is add~431
--operation mode is arithmetic

A1L23_carry_eqn = A1L20;
A1L23 = q[14] $ (!A1L23_carry_eqn);

--A1L24 is add~433
--operation mode is arithmetic

A1L24 = CARRY(q[14] & (!A1L20));


--A1L25 is add~436
--operation mode is arithmetic

A1L25_carry_eqn = A1L28;
A1L25 = q[11] $ (A1L25_carry_eqn);

--A1L26 is add~438
--operation mode is arithmetic

A1L26 = CARRY(!A1L28 # !q[11]);


--A1L27 is add~441
--operation mode is arithmetic

A1L27_carry_eqn = A1L32;
A1L27 = q[10] $ (!A1L27_carry_eqn);

--A1L28 is add~443
--operation mode is arithmetic

A1L28 = CARRY(q[10] & (!A1L32));


--A1L29 is add~446
--operation mode is arithmetic

A1L29_carry_eqn = A1L26;
A1L29 = q[12] $ (!A1L29_carry_eqn);

--A1L30 is add~448
--operation mode is arithmetic

A1L30 = CARRY(q[12] & (!A1L26));


--A1L31 is add~451
--operation mode is arithmetic

A1L31_carry_eqn = A1L40;
A1L31 = q[9] $ (A1L31_carry_eqn);

--A1L32 is add~453
--operation mode is arithmetic

A1L32 = CARRY(!A1L40 # !q[9]);


--A1L33 is add~456
--operation mode is arithmetic

A1L33_carry_eqn = A1L36;
A1L33 = q[7] $ (A1L33_carry_eqn);

--A1L34 is add~458
--operation mode is arithmetic

A1L34 = CARRY(!A1L36 # !q[7]);


--A1L35 is add~461
--operation mode is arithmetic

A1L35_carry_eqn = A1L38;
A1L35 = q[6] $ (!A1L35_carry_eqn);

--A1L36 is add~463
--operation mode is arithmetic

A1L36 = CARRY(q[6] & (!A1L38));


--A1L37 is add~466
--operation mode is arithmetic

A1L37_carry_eqn = A1L44;
A1L37 = q[5] $ (A1L37_carry_eqn);

--A1L38 is add~468
--operation mode is arithmetic

A1L38 = CARRY(!A1L44 # !q[5]);


--A1L39 is add~471
--operation mode is arithmetic

A1L39_carry_eqn = A1L34;
A1L39 = q[8] $ (!A1L39_carry_eqn);

--A1L40 is add~473
--operation mode is arithmetic

A1L40 = CARRY(q[8] & (!A1L34));


--A1L41 is add~476
--operation mode is arithmetic

A1L41 = !q[0];

--A1L42 is add~478
--operation mode is arithmetic

A1L42 = CARRY(q[0]);


--A1L43 is add~481
--operation mode is arithmetic

A1L43_carry_eqn = A1L46;
A1L43 = q[4] $ (!A1L43_carry_eqn);

--A1L44 is add~483
--operation mode is arithmetic

A1L44 = CARRY(q[4] & (!A1L46));


--A1L45 is add~486
--operation mode is arithmetic

A1L45_carry_eqn = A1L48;
A1L45 = q[3] $ (A1L45_carry_eqn);

--A1L46 is add~488
--operation mode is arithmetic

A1L46 = CARRY(!A1L48 # !q[3]);


--A1L47 is add~491
--operation mode is arithmetic

A1L47_carry_eqn = A1L50;
A1L47 = q[2] $ (!A1L47_carry_eqn);

--A1L48 is add~493
--operation mode is arithmetic

A1L48 = CARRY(q[2] & (!A1L50));


--A1L49 is add~496
--operation mode is arithmetic

A1L49_carry_eqn = A1L42;
A1L49 = q[1] $ (A1L49_carry_eqn);

--A1L50 is add~498
--operation mode is arithmetic

A1L50 = CARRY(!A1L42 # !q[1]);


--CLK is CLK
--operation mode is input

CLK = INPUT();


--outclk is outclk
--operation mode is output

outclk = OUTPUT(a);