control.vhd

数字钟的VHDL源程序

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY control IS
 PORT( reset:  IN  STD_LOGIC;        --system reset signal
       begend: IN  STD_LOGIC;        --key of begin&end
       keyup:  IN  STD_LOGIC;        --set time value
       enter:  IN  STD_LOGIC;        --enable the configuration of next time bit
       settime:  OUT STD_LOGIC;      --output to inform module "clock" to adjust time according to the newly-set time
       hourhset: OUT INTEGER RANGE 0 TO 2;        --HOUR high SET BY CONTROL PART
       hourlset: OUT INTEGER RANGE 0 TO 9;        --HOUR low SET BY CONTROL PART
       minhset:  OUT INTEGER RANGE 0 TO 5;        --MINUTE high SET BY CONTROL PART
       minlset:  OUT INTEGER RANGE 0 TO 9;        --MINUTE low SET BY CONTROL PART
       sechset:  OUT INTEGER RANGE 0 TO 5;        --SECOND high SET BY CONTROL PART
       seclset:  OUT INTEGER RANGE 0 TO 9;        --SECOND low SET BY CONTROL PART
       weekset:  OUT INTEGER RANGE 0 TO 7);
END control;
ARCHITECTURE archi OF control IS
 TYPE STATE IS(sethh,sethl,setmh,setml,setsh,setsl,weekday,ini);  --seven operation states in the control part
 SIGNAL adjsta:  STATE;
 SIGNAL setmark: STD_LOGIC;
 SIGNAL seclow,minlow,hourlow: INTEGER RANGE 0 TO 9;
 SIGNAL sechigh,minhigh: INTEGER RANGE 0 TO 5;
 SIGNAL hourhigh: INTEGER RANGE 0 TO 2;
 SIGNAL week: INTEGER RANGE 0 TO 7;
BEGIN
 seclset<=seclow;
 sechset<=sechigh;
 minlset<=minlow;
 minhset<=minhigh;
 hourlset<=hourlow;
 hourhset<=hourhigh;
 settime<=setmark;
 weekset<=week;
mark:  --this process will decide the output control signal "settime" for "clock" module
PROCESS(begend)
 begin
  if reset='1' then
     setmark<='0';
  elsif begend'event and begend='1' then
     if setmark='1' then
        setmark<='0';
     else
        setmark<='1';
     end if;
  end if;
END PROCESS;
normal_run:  --this process acts as core state machine
 PROCESS(enter,reset)
 BEGIN
    IF reset='1' THEN
       adjsta<=ini;
    ELSIF enter='1' AND enter'event THEN
          case adjsta IS
               WHEN ini=>
                    adjsta<=weekday;
               WHEN weekday=>
                    adjsta<=sethh;
               WHEN sethh=>
                    adjsta<=sethl;
               WHEN sethl=>
                    adjsta<=setmh;
               WHEN setmh=>
                    adjsta<=setml;
               WHEN setml=>
                    adjsta<=setsh;
               WHEN setsh=>
                    adjsta<=setsl;
               WHEN setsl=>
                    adjsta<=sethh;      --recycle

           end case;
   END IF;
 END PROCESS;
time_adjust:    --the set value increased as the "keyup" is pushed down
  PROCESS(keyup)
   BEGIN
     if reset='1' then
        hourhigh<=0;
        hourlow<=0;
        minhigh<=0;
        minlow<=0;
        sechigh<=0;
        seclow<=0;
        week<=0;
     elsif keyup='1' AND keyup'event THEN
           case adjsta IS
                WHEN sethh=>
                     hourhigh<=hourhigh+1;
                WHEN sethl=>
                     hourlow<=hourlow+1;
                WHEN setmh=>
                     minhigh<=minhigh+1;
                WHEN setml=>
                     minlow<=minlow+1;
                WHEN setsh=>
                     sechigh<=sechigh+1;
                WHEN setsl=>
                     seclow<=seclow+1;
                WHEN weekday=>
                     week<=week+1;
                WHEN ini=>
                     NULL;
          end case;
     end if;
  END PROCESS;
END archi;