alarm_clock.rpt

数字钟的VHDL源程序

Project Information                                  f:\clock2\alarm_clock.rpt

MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 03/29/2008 11:37:59

Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
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their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input Output Bidir  Memory  Memory  			 LCs
POF       Device          Pins  Pins   Pins   Bits % Utilized  LCs  % Utilized

alarm_clock
      EP1K30QC208-3        10     13     0    0         0  %    340      19 %

User Pins:                 10     13     0  



Project Information                                  f:\clock2\alarm_clock.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

alarm_clock@174                   addsel0
alarm_clock@176                   addsel1
alarm_clock@179                   addsel2
alarm_clock@38                    alarm
alarm_clock@191                   alarm2
alarm_clock@75                    begend
alarm_clock@189                   begend2
alarm_clock@83                    clk_1hz
alarm_clock@85                    clk_1khz
alarm_clock@86                    clk_10hz
alarm_clock@87                    clk_500hz
alarm_clock@88                    enter
alarm_clock@89                    keyup
alarm_clock@92                    reset
alarm_clock@173                   secdis0
alarm_clock@175                   secdis1
alarm_clock@177                   secdis2
alarm_clock@187                   secdis3
alarm_clock@190                   secdis4
alarm_clock@192                   secdis5
alarm_clock@195                   secdis6
alarm_clock@197                   secdis7
alarm_clock@93                    sel


Project Information                                  f:\clock2\alarm_clock.rpt

** STATE MACHINE ASSIGNMENTS **


|CONTROL3:57|adjsta: MACHINE
        OF BITS (
           |CONTROL3:57|adjsta~8,
           |CONTROL3:57|adjsta~7,
           |CONTROL3:57|adjsta~6,
           |CONTROL3:57|adjsta~5,
           |CONTROL3:57|adjsta~4,
           |CONTROL3:57|adjsta~3,
           |CONTROL3:57|adjsta~2,
           |CONTROL3:57|adjsta~1
        )
        WITH STATES (
                           sethh = B"10000001", 
                           sethl = B"01000001", 
                           setmh = B"00100001", 
                           setml = B"00010001", 
                           setsh = B"00001001", 
                           setsl = B"00000101", 
                         weekday = B"00000011", 
                             ini = B"00000000"
);


|CONTROL3:59|adjsta: MACHINE
        OF BITS (
           |CONTROL3:59|adjsta~8,
           |CONTROL3:59|adjsta~7,
           |CONTROL3:59|adjsta~6,
           |CONTROL3:59|adjsta~5,
           |CONTROL3:59|adjsta~4,
           |CONTROL3:59|adjsta~3,
           |CONTROL3:59|adjsta~2
        )
        WITH STATES (
                           sethh = B"1000000", 
                           sethl = B"0100000", 
                           setmh = B"0010000", 
                           setml = B"0001000", 
                           setsh = B"0000100", 
                           setsl = B"0000010", 
                         weekday = B"0000001", 
                             ini = B"0000000"
);



Project Information                                  f:\clock2\alarm_clock.rpt

** FILE HIERARCHY **



|dou:11|
|dou:13|
|ring:23|
|mux:28|
|control3:57|
|control3:57|lpm_add_sub:246|
|control3:57|lpm_add_sub:246|addcore:adder|
|control3:57|lpm_add_sub:246|altshift:result_ext_latency_ffs|
|control3:57|lpm_add_sub:246|altshift:carry_ext_latency_ffs|
|control3:57|lpm_add_sub:246|altshift:oflow_ext_latency_ffs|
|control3:57|lpm_add_sub:270|
|control3:57|lpm_add_sub:270|addcore:adder|
|control3:57|lpm_add_sub:270|altshift:result_ext_latency_ffs|
|control3:57|lpm_add_sub:270|altshift:carry_ext_latency_ffs|
|control3:57|lpm_add_sub:270|altshift:oflow_ext_latency_ffs|
|control3:57|lpm_add_sub:296|
|control3:57|lpm_add_sub:296|addcore:adder|
|control3:57|lpm_add_sub:296|altshift:result_ext_latency_ffs|
|control3:57|lpm_add_sub:296|altshift:carry_ext_latency_ffs|
|control3:57|lpm_add_sub:296|altshift:oflow_ext_latency_ffs|
|control3:57|lpm_add_sub:323|
|control3:57|lpm_add_sub:323|addcore:adder|
|control3:57|lpm_add_sub:323|altshift:result_ext_latency_ffs|
|control3:57|lpm_add_sub:323|altshift:carry_ext_latency_ffs|
|control3:57|lpm_add_sub:323|altshift:oflow_ext_latency_ffs|
|control3:57|lpm_add_sub:349|
|control3:57|lpm_add_sub:349|addcore:adder|
|control3:57|lpm_add_sub:349|altshift:result_ext_latency_ffs|
|control3:57|lpm_add_sub:349|altshift:carry_ext_latency_ffs|
|control3:57|lpm_add_sub:349|altshift:oflow_ext_latency_ffs|
|control3:57|lpm_add_sub:376|
|control3:57|lpm_add_sub:376|addcore:adder|
|control3:57|lpm_add_sub:376|altshift:result_ext_latency_ffs|
|control3:57|lpm_add_sub:376|altshift:carry_ext_latency_ffs|
|control3:57|lpm_add_sub:376|altshift:oflow_ext_latency_ffs|
|control3:57|lpm_add_sub:402|
|control3:57|lpm_add_sub:402|addcore:adder|
|control3:57|lpm_add_sub:402|altshift:result_ext_latency_ffs|
|control3:57|lpm_add_sub:402|altshift:carry_ext_latency_ffs|
|control3:57|lpm_add_sub:402|altshift:oflow_ext_latency_ffs|
|control3:59|
|control3:59|lpm_add_sub:246|