i2c.hier_info

I2C总线的逻辑代码.Verilog编写!很好用.调试成功.

|i2c
data[0] <= i2c_wreg:U1.data
data[0] <= i2c_tbuf:U5.data
data[1] <= i2c_wreg:U1.data
data[1] <= i2c_tbuf:U5.data
data[2] <= i2c_wreg:U1.data
data[2] <= i2c_tbuf:U5.data
data[3] <= i2c_wreg:U1.data
data[3] <= i2c_tbuf:U5.data
data[4] <= i2c_wreg:U1.data
data[4] <= i2c_tbuf:U5.data
data[5] <= i2c_wreg:U1.data
data[5] <= i2c_tbuf:U5.data
data[6] <= i2c_wreg:U1.data
data[6] <= i2c_tbuf:U5.data
data[7] <= i2c_wreg:U1.data
data[7] <= i2c_tbuf:U5.data
addr[0] => addr[0]~1.IN2
addr[1] => addr[1]~0.IN2
rst_l => rst_l~0.IN3
clock => clock~0.IN3
cs_l => cs_l~0.IN2
ack_l <= i2c_wreg:U1.ack_l
rd_wr_l => rd_wr_l~0.IN2
reg_clk_in => reg_clk_in~0.IN1
reg_clk_out <= i2c_wreg:U1.reg_clk_out
scl_pin <= i2c_tbuf:U5.scl_pin
sda_pin <= i2c_st:U4.sda_pin
sda_pin <= i2c_tbuf:U5.sda_pin


|i2c|i2c_wreg:U1
data[0] => wrd_add[0]~reg0.DATAIN
data[1] => wrd_add[1]~reg0.DATAIN
data[2] => wrd_add[2]~reg0.DATAIN
data[3] => wrd_add[3]~reg0.DATAIN
data[4] => wrd_add[4]~reg0.DATAIN
data[5] => wrd_add[5]~reg0.DATAIN
data[6] => wrd_add[6]~reg0.DATAIN
data[7] => wrd_add[7]~reg0.DATAIN
addr[0] => Equal0.IN0
addr[1] => Equal0.IN1
rst_l => ack_l~reg0.PRESET
rst_l => i2c_go~reg0.ACLR
rst_l => reg_clk_out~reg0.ACLR
clock => reg_clk_out~reg0.CLK
clock => i2c_go~reg0.CLK
clock => ack_l~reg0.CLK
cs_l => ack_l~reg0.DATAIN
cs_l => always0~0.IN0
rd_wr_l => always0~0.IN1
scl_cnt_en => i2c_go~0.OUTPUTSELECT
reg_clk_in => wrd_add[7]~reg0.CLK
reg_clk_in => wrd_add[6]~reg0.CLK
reg_clk_in => wrd_add[5]~reg0.CLK
reg_clk_in => wrd_add[4]~reg0.CLK
reg_clk_in => wrd_add[3]~reg0.CLK
reg_clk_in => wrd_add[2]~reg0.CLK
reg_clk_in => wrd_add[1]~reg0.CLK
reg_clk_in => wrd_add[0]~reg0.CLK
reg_clk_out <= reg_clk_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
wrd_add[0] <= wrd_add[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wrd_add[1] <= wrd_add[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wrd_add[2] <= wrd_add[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wrd_add[3] <= wrd_add[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wrd_add[4] <= wrd_add[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wrd_add[5] <= wrd_add[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wrd_add[6] <= wrd_add[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wrd_add[7] <= wrd_add[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_go <= i2c_go~reg0.DB_MAX_OUTPUT_PORT_TYPE
ack_l <= ack_l~reg0.DB_MAX_OUTPUT_PORT_TYPE


|i2c|i2c_rreg:U2
wrd_add[0] => Mux7.IN0
wrd_add[1] => Mux6.IN2
wrd_add[2] => Mux5.IN2
wrd_add[3] => Mux4.IN2
wrd_add[4] => Mux3.IN2
wrd_add[5] => Mux2.IN2
wrd_add[6] => Mux1.IN0
wrd_add[7] => Mux0.IN0
i2c_rdata[0] => Mux7.IN1
i2c_rdata[1] => Mux6.IN3
i2c_rdata[2] => Mux5.IN3
i2c_rdata[3] => Mux4.IN3
i2c_rdata[4] => Mux3.IN3
i2c_rdata[5] => Mux2.IN3
i2c_rdata[6] => Mux1.IN1
i2c_rdata[7] => Mux0.IN1
i2c_rdy => Mux0.IN2
i2c_rdy => Mux0.IN3
i2c_act => Mux7.IN2
i2c_act => Mux7.IN3
ack_err => Mux1.IN2
ack_err => Mux1.IN3
addr[0] => Mux7.IN5
addr[0] => Mux6.IN5
addr[0] => Mux5.IN5
addr[0] => Mux4.IN5
addr[0] => Mux3.IN5
addr[0] => Mux2.IN5
addr[0] => Mux1.IN5
addr[0] => Mux0.IN5
addr[1] => Mux7.IN4
addr[1] => Mux6.IN4
addr[1] => Mux5.IN4
addr[1] => Mux4.IN4
addr[1] => Mux3.IN4
addr[1] => Mux2.IN4
addr[1] => Mux1.IN4
addr[1] => Mux0.IN4
data_o[0] <= Mux7.DB_MAX_OUTPUT_PORT_TYPE
data_o[1] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
data_o[2] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
data_o[3] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
data_o[4] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
data_o[5] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
data_o[6] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
data_o[7] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|i2c|i2c_clk:U3
clock => cntr[7].CLK
clock => cntr[6].CLK
clock => cntr[5].CLK
clock => cntr[4].CLK
clock => cntr[3].CLK
clock => cntr[2].CLK
clock => cntr[1].CLK
clock => cntr[0].CLK
clock => scl_tick~reg0.CLK
rst_l => scl_tick~reg0.ACLR
rst_l => cntr[7].ACLR
rst_l => cntr[6].ACLR
rst_l => cntr[5].ACLR
rst_l => cntr[4].ACLR
rst_l => cntr[3].ACLR
rst_l => cntr[2].ACLR
rst_l => cntr[1].ACLR
rst_l => cntr[0].ACLR
scl_cnt_en => cntr~7.OUTPUTSELECT
scl_cnt_en => cntr~6.OUTPUTSELECT
scl_cnt_en => cntr~5.OUTPUTSELECT
scl_cnt_en => cntr~4.OUTPUTSELECT
scl_cnt_en => cntr~3.OUTPUTSELECT
scl_cnt_en => cntr~2.OUTPUTSELECT
scl_cnt_en => cntr~1.OUTPUTSELECT
scl_cnt_en => cntr~0.OUTPUTSELECT
scl_tick <= scl_tick~reg0.DB_MAX_OUTPUT_PORT_TYPE


|i2c|i2c_st:U4
rst_l => scl_en.ACLR
rst_l => en_cntr.ACLR
rst_l => cntr_done.ACLR
rst_l => bit_cntr[0].PRESET
rst_l => bit_cntr[1].PRESET
rst_l => bit_cntr[2].PRESET
rst_l => i2c_rdata[0]~reg0.ACLR
rst_l => i2c_rdata[1]~reg0.ACLR
rst_l => i2c_rdata[2]~reg0.ACLR
rst_l => i2c_rdata[3]~reg0.ACLR
rst_l => i2c_rdata[4]~reg0.ACLR
rst_l => i2c_rdata[5]~reg0.ACLR
rst_l => i2c_rdata[6]~reg0.ACLR
rst_l => i2c_rdata[7]~reg0.ACLR
rst_l => i2c_rdy~reg0.ACLR
rst_l => scl_cnt_en~reg0.ACLR
rst_l => scl~reg0.PRESET
rst_l => sda~reg0.PRESET
rst_l => ack_err~reg0.ACLR
rst_l => i2c_state~75.IN1
clock => bit_cntr[2].CLK
clock => bit_cntr[1].CLK
clock => bit_cntr[0].CLK
clock => cntr_done.CLK
clock => en_cntr.CLK
clock => scl_cnt_en~reg0.CLK
clock => scl_en.CLK
clock => scl~reg0.CLK
clock => sda~reg0.CLK
clock => i2c_rdata[7]~reg0.CLK
clock => i2c_rdata[6]~reg0.CLK
clock => i2c_rdata[5]~reg0.CLK
clock => i2c_rdata[4]~reg0.CLK
clock => i2c_rdata[3]~reg0.CLK
clock => i2c_rdata[2]~reg0.CLK
clock => i2c_rdata[1]~reg0.CLK
clock => i2c_rdata[0]~reg0.CLK
clock => i2c_rdy~reg0.CLK
clock => ack_err~reg0.CLK
clock => i2c_state~74.IN1
scl_tick => always6~0.IN1
scl_tick => always5~0.IN1
scl_tick => always1~1.IN1
scl_tick => i2c_state~68.OUTPUTSELECT
scl_tick => i2c_state~67.OUTPUTSELECT
scl_tick => always0~1.IN1
scl_tick => always0~0.IN1
scl_tick => i2c_state~31.OUTPUTSELECT
scl_tick => i2c_state~30.OUTPUTSELECT
scl_tick => i2c_state~29.OUTPUTSELECT
scl_tick => i2c_state~28.OUTPUTSELECT
scl_tick => i2c_state~27.OUTPUTSELECT
scl_tick => i2c_state~26.OUTPUTSELECT
scl_tick => i2c_state~25.OUTPUTSELECT
scl_tick => i2c_state~24.OUTPUTSELECT
scl_tick => i2c_state~23.OUTPUTSELECT
scl_tick => i2c_state~22.OUTPUTSELECT
scl_tick => i2c_state~21.OUTPUTSELECT
scl_tick => i2c_state~20.OUTPUTSELECT
scl_tick => i2c_state~19.OUTPUTSELECT
scl_tick => i2c_state~18.OUTPUTSELECT
scl_tick => i2c_state~17.OUTPUTSELECT
scl_tick => i2c_state~16.OUTPUTSELECT
scl_tick => i2c_state~15.OUTPUTSELECT
i2c_go => ack_err~0.OUTPUTSELECT
i2c_go => i2c_rdy~0.OUTPUTSELECT
i2c_go => i2c_rdata~15.OUTPUTSELECT
i2c_go => i2c_rdata~14.OUTPUTSELECT
i2c_go => i2c_rdata~13.OUTPUTSELECT
i2c_go => i2c_rdata~12.OUTPUTSELECT
i2c_go => i2c_rdata~11.OUTPUTSELECT
i2c_go => i2c_rdata~10.OUTPUTSELECT
i2c_go => i2c_rdata~9.OUTPUTSELECT
i2c_go => i2c_rdata~8.OUTPUTSELECT
i2c_go => i2c_state~14.OUTPUTSELECT
i2c_go => i2c_state~13.OUTPUTSELECT
i2c_go => i2c_state~12.OUTPUTSELECT
i2c_go => i2c_state~11.OUTPUTSELECT
i2c_go => i2c_state~10.OUTPUTSELECT
i2c_go => i2c_state~9.OUTPUTSELECT
i2c_go => i2c_state~8.OUTPUTSELECT
i2c_go => i2c_state~7.OUTPUTSELECT
i2c_go => i2c_state~6.OUTPUTSELECT
i2c_go => i2c_state~5.OUTPUTSELECT
i2c_go => i2c_state~4.OUTPUTSELECT
i2c_go => i2c_state~3.OUTPUTSELECT
i2c_go => i2c_state~2.OUTPUTSELECT
i2c_go => i2c_state~1.OUTPUTSELECT
i2c_go => i2c_state~0.OUTPUTSELECT
wrd_add[0] => Mux0.IN7
wrd_add[1] => Mux0.IN6
wrd_add[2] => Mux0.IN5
wrd_add[3] => Mux0.IN4
wrd_add[4] => Mux0.IN3
wrd_add[5] => Mux0.IN2
wrd_add[6] => Mux0.IN1
wrd_add[7] => Mux0.IN0
sda_pin => always10~3.IN1
sda_pin => i2c_rdata~7.DATAB
sda_pin => i2c_rdata~6.DATAB
sda_pin => i2c_rdata~5.DATAB
sda_pin => i2c_rdata~4.DATAB
sda_pin => i2c_rdata~3.DATAB
sda_pin => i2c_rdata~2.DATAB
sda_pin => i2c_rdata~1.DATAB
sda_pin => i2c_rdata~0.DATAB
sda <= sda~reg0.DB_MAX_OUTPUT_PORT_TYPE
scl <= scl~reg0.DB_MAX_OUTPUT_PORT_TYPE
scl_cnt_en <= scl_cnt_en~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_rdy <= i2c_rdy~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_act <= i2c_state.idle.DB_MAX_OUTPUT_PORT_TYPE
i2c_rdata[0] <= i2c_rdata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_rdata[1] <= i2c_rdata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_rdata[2] <= i2c_rdata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_rdata[3] <= i2c_rdata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_rdata[4] <= i2c_rdata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_rdata[5] <= i2c_rdata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_rdata[6] <= i2c_rdata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
i2c_rdata[7] <= i2c_rdata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ack_err <= ack_err~reg0.DB_MAX_OUTPUT_PORT_TYPE


|i2c|i2c_tbuf:U5
data_o[0] => data[0]~0.DATAIN
data_o[1] => data[1]~1.DATAIN
data_o[2] => data[2]~2.DATAIN
data_o[3] => data[3]~3.DATAIN
data_o[4] => data[4]~4.DATAIN
data_o[5] => data[5]~5.DATAIN
data_o[6] => data[6]~6.DATAIN
data_o[7] => data[7]~7.DATAIN
data[0] <= data[0]~0.DB_MAX_OUTPUT_PORT_TYPE
data[1] <= data[1]~1.DB_MAX_OUTPUT_PORT_TYPE
data[2] <= data[2]~2.DB_MAX_OUTPUT_PORT_TYPE
data[3] <= data[3]~3.DB_MAX_OUTPUT_PORT_TYPE
data[4] <= data[4]~4.DB_MAX_OUTPUT_PORT_TYPE
data[5] <= data[5]~5.DB_MAX_OUTPUT_PORT_TYPE
data[6] <= data[6]~6.DB_MAX_OUTPUT_PORT_TYPE
data[7] <= data[7]~7.DB_MAX_OUTPUT_PORT_TYPE
cs_l => data~8.IN0
rd_wr_l => data~8.IN1
sda => sda_pin~0.OE
scl => scl_pin~0.OE
scl_pin <= scl_pin~0.DB_MAX_OUTPUT_PORT_TYPE
sda_pin <= sda_pin~0.DB_MAX_OUTPUT_PORT_TYPE