i2c.tan.rpt

I2C总线的逻辑代码.Verilog编写!很好用.调试成功.

; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|cntr[0]           ; i2c_clk:U3|cntr[1]           ; clock      ; clock    ; None                        ; None                      ; 1.737 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|scl_tick          ; i2c_st:U4|i2c_state.dev_add1 ; clock      ; clock    ; None                        ; None                      ; 1.728 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|scl                ; i2c_st:U4|ack_err            ; clock      ; clock    ; None                        ; None                      ; 1.634 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|cntr[6]           ; i2c_clk:U3|scl_tick          ; clock      ; clock    ; None                        ; None                      ; 1.624 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.dev_add2 ; i2c_st:U4|en_cntr            ; clock      ; clock    ; None                        ; None                      ; 1.596 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_wreg:U1|i2c_go           ; i2c_st:U4|i2c_rdata[0]       ; clock      ; clock    ; None                        ; None                      ; 1.589 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.idle     ; i2c_st:U4|scl_cnt_en         ; clock      ; clock    ; None                        ; None                      ; 1.572 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|cntr_done          ; i2c_st:U4|en_cntr            ; clock      ; clock    ; None                        ; None                      ; 1.569 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|scl_cnt_en         ; i2c_wreg:U1|i2c_go           ; clock      ; clock    ; None                        ; None                      ; 1.543 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.en_clk   ; i2c_st:U4|i2c_state.en_clk   ; clock      ; clock    ; None                        ; None                      ; 1.541 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.idle     ; i2c_st:U4|i2c_state.en_clk   ; clock      ; clock    ; None                        ; None                      ; 1.517 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.idle     ; i2c_st:U4|i2c_state.idle     ; clock      ; clock    ; None                        ; None                      ; 1.508 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.dev_add2 ; i2c_st:U4|i2c_state.ack3     ; clock      ; clock    ; None                        ; None                      ; 1.490 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.w_add    ; i2c_st:U4|i2c_state.ack2     ; clock      ; clock    ; None                        ; None                      ; 1.486 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|scl_tick          ; i2c_st:U4|i2c_state.dev_add2 ; clock      ; clock    ; None                        ; None                      ; 1.475 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|cntr[4]           ; i2c_clk:U3|scl_tick          ; clock      ; clock    ; None                        ; None                      ; 1.446 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.wait1    ; i2c_st:U4|i2c_state.wait1    ; clock      ; clock    ; None                        ; None                      ; 1.392 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|cntr_done          ; i2c_st:U4|i2c_state.dev_add2 ; clock      ; clock    ; None                        ; None                      ; 1.374 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_rdata[0]       ; i2c_st:U4|i2c_rdata[0]       ; clock      ; clock    ; None                        ; None                      ; 1.360 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|cntr[7]           ; i2c_clk:U3|scl_tick          ; clock      ; clock    ; None                        ; None                      ; 1.345 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.wait1    ; i2c_st:U4|i2c_state.start2   ; clock      ; clock    ; None                        ; None                      ; 1.326 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.ack2     ; i2c_st:U4|i2c_state.ack2     ; clock      ; clock    ; None                        ; None                      ; 1.325 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.w_add    ; i2c_st:U4|i2c_state.w_add    ; clock      ; clock    ; None                        ; None                      ; 1.306 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.en_clk   ; i2c_st:U4|i2c_state.start1   ; clock      ; clock    ; None                        ; None                      ; 1.299 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|scl                ; i2c_st:U4|scl                ; clock      ; clock    ; None                        ; None                      ; 1.285 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|cntr[2]           ; i2c_clk:U3|scl_tick          ; clock      ; clock    ; None                        ; None                      ; 1.285 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.data     ; i2c_st:U4|i2c_state.data     ; clock      ; clock    ; None                        ; None                      ; 1.284 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|cntr[7]           ; i2c_clk:U3|cntr[7]           ; clock      ; clock    ; None                        ; None                      ; 1.284 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|cntr[2]           ; i2c_clk:U3|cntr[2]           ; clock      ; clock    ; None                        ; None                      ; 1.282 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|cntr[6]           ; i2c_clk:U3|cntr[6]           ; clock      ; clock    ; None                        ; None                      ; 1.279 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_rdata[1]       ; i2c_st:U4|i2c_rdata[1]       ; clock      ; clock    ; None                        ; None                      ; 1.277 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_rdata[2]       ; i2c_st:U4|i2c_rdata[2]       ; clock      ; clock    ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_rdata[3]       ; i2c_st:U4|i2c_rdata[3]       ; clock      ; clock    ; None                        ; None                      ; 1.275 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_clk:U3|cntr[1]           ; i2c_clk:U3|cntr[1]           ; clock      ; clock    ; None                        ; None                      ; 1.272 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|i2c_state.dev_add2 ; i2c_st:U4|i2c_state.dev_add2 ; clock      ; clock    ; None                        ; None                      ; 1.265 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|scl_cnt_en         ; i2c_st:U4|scl_cnt_en         ; clock      ; clock    ; None                        ; None                      ; 1.260 ns                ;
; N/A                                     ; Restricted to 275.03 MHz ( period = 3.636 ns )      ; i2c_st:U4|scl_en             ; i2c_st:U4|scl                ; clock      ; clock    ; None                        ; None                      ; 1.240 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                              ;                              ;            ;          ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+------------------------------+------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+------------------------------------------------------------------------------------+
; tsu                                                                                ;
+-------+--------------+------------+---------+-------------------------+------------+
; Slack ; Required tsu ; Actual tsu ; From    ; To                      ; To Clock   ;
+-------+--------------+------------+---------+-------------------------+------------+
; N/A   ; None         ; 8.182 ns   ; addr[0] ; i2c_wreg:U1|i2c_go      ; clock      ;
; N/A   ; None         ; 8.096 ns   ; addr[0] ; i2c_wreg:U1|reg_clk_out ; clock      ;
; N/A   ; None         ; 7.410 ns   ; addr[1] ; i2c_wreg:U1|i2c_go      ; clock      ;
; N/A   ; None         ; 7.324 ns   ; addr[1] ; i2c_wreg:U1|reg_clk_out ; clock      ;
; N/A   ; None         ; 6.812 ns   ; cs_l    ; i2c_wreg:U1|i2c_go      ; clock      ;
; N/A   ; None         ; 6.726 ns   ; cs_l    ; i2c_wreg:U1|reg_clk_out ; clock      ;
; N/A   ; None         ; 6.686 ns   ; rd_wr_l ; i2c_wreg:U1|i2c_go      ; clock      ;
; N/A   ; None         ; 6.600 ns   ; rd_wr_l ; i2c_wreg:U1|reg_clk_out ; clock      ;
; N/A   ; None         ; 6.059 ns   ; sda_pin ; i2c_st:U4|i2c_rdata[6]  ; clock      ;
; N/A   ; None         ; 6.055 ns   ; sda_pin ; i2c_st:U4|i2c_rdata[4]  ; clock      ;
; N/A   ; None         ; 6.051 ns   ; sda_pin ; i2c_st:U4|i2c_rdata[5]  ; clock      ;
; N/A   ; None         ; 5.745 ns   ; sda_pin ; i2c_st:U4|ack_err       ; clock      ;
; N/A   ; None         ; 5.531 ns   ; sda_pin ; i2c_st:U4|i2c_rdata[1]  ; clock      ;
; N/A   ; None         ; 5.529 ns   ; sda_pin ; i2c_st:U4|i2c_rdata[2]  ; clock      ;
; N/A   ; None         ; 5.527 ns   ; sda_pin ; i2c_st:U4|i2c_rdata[3]  ; clock      ;
; N/A   ; None         ; 5.396 ns   ; sda_pin ; i2c_st:U4|i2c_rdata[7]  ; clock      ;
; N/A   ; None         ; 4.219 ns   ; data[4] ; i2c_wreg:U1|wrd_add[4]  ; reg_c